Mcu_Cfg.h

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/*
*
* Copyright (C) 2023 Texas Instruments Incorporated
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  /****************************************************************************
    Project: Mcu_j7
    Date   : 2023-06-18 16:51:07

    This file is generated by EB Tresos
    Do not modify this file,otherwise the software may behave in unexpected way.

 ******************************************************************************/

#ifndef MCU_CFG_H
#define MCU_CFG_H

/*********************************************************************************************************************
 * Standard Header Files
 *********************************************************************************************************************/

/*********************************************************************************************************************
 * Other Header Files
 *********************************************************************************************************************/

#ifdef __cplusplus
extern "C" {
#endif

#define MCU_VARIANT_POST_BUILD  (STD_ON)

/**********************************************************************************************************************
 * Version Check
 *********************************************************************************************************************/
#define MCU_CFG_ID                      (0x1U)



/* Requirements: SWS_Mcu_00129 */
#define MCU_CFG_MAJOR_VERSION           (9U)

#define MCU_CFG_MINOR_VERSION           (0U)

#define MCU_CFG_PATCH_VERSION           (0U)
/* @} */

/*********************************************************************************************************************
 * Exported enums
 *********************************************************************************************************************/


/*********************************************************************************************************************
 * Exported Preprocessor #define Constants
 *********************************************************************************************************************/
#define MCU_DEV_ERROR_DETECT       (STD_ON)

#define MCU_GET_RAM_STATE_API      (STD_OFF)

#define MCU_INIT_CLOCK_API         (STD_ON)

#define MCU_PERFORM_RESET_API      (STD_ON)

#define MCU_GET_VERSION_INFO_API   (STD_ON)

#define MCU_INIT_RAM_API           (STD_OFF)

#define MCU_NO_PLL                 (STD_OFF)

#define MCU_REGISTER_READBACK_API  (STD_OFF)


#define DemConf_DemEventParameter_MCU_DEM_NO_EVENT (0xFFFFU)
#define MCU_DEM_NO_EVENT DemConf_DemEventParameter_MCU_DEM_NO_EVENT

/* @} */

#ifndef MCU_E_CLOCK_FAILURE

#define MCU_E_CLOCK_FAILURE          (MCU_DEM_NO_EVENT)
#endif

#define MCU_PERFORM_RESET_MASK                  ((uint32) 0x00060000U)
#define MCU_PERFORM_RESET_CLEAR_MASK            ((uint32) 0xFFFFFFFFU)
#define MCU_RST_SRC_STAT_CLEAR                  ((uint32) 0x190B0BU)
#define SW_MCU_WARM_RST                         ((uint32) 0x1U)
#define SW_MAIN_WARM_RST                        ((uint32) 0x2U)
#define SW_MAIN_POR                             ((uint32) 0x8U)
#define MCU_RESETZ                              ((uint32) 0x100U)
#define WARM_OUT_RST                            ((uint32) 0x10000U)
#define COLD_OUT_RST                            ((uint32) 0x80000U)
#define DEBUG_RST_OCCURED                       ((uint32) 0x100000U)

#define rstaddr                                 ((LLD_wkup_ctrl_mmr_cfg0Regs*)0x43000000U)

#define MCU_ERRORRST_MASK                       ((Mcu_RawResetType)0xFFFF0000U)

#define MCU_UTILS_ARRAYSIZE(array)             ((sizeof (array) / \
                                                 sizeof ((array)[0])))
                                                 
#define MCU_RESET_STATUS_NUMBER                          ((uint8)0x6)

#define ARRAYSIZE(array)             ((sizeof (array) / \
                                         sizeof ((array)[0])))


/*
 * The following defines shall be used as input
 * parameter for: Mcu_SetMode(),
 *                Mcu_InitClock()
 *                Mcu_InitRamSection()
 */

/*<MCU_CFG_MODEUSERCONFIG_LIST>*/

#define McuConf_McuModeSettingConf_McuModeSettingConf_0 (0U)
/*</MCU_CFG_MODEUSERCONFIG_LIST>*/

/*<MCU_CFG_CLOCKUSERCONFIG_LIST>*/
/*
* Clock configuration
*/
/* The nomenclature is as per AUTOSAR_TPS_ECUConfiguration.pdf
*/
#define McuConf_McuClockSettingConfig_MCU_MCAN0 (0U)
#define McuConf_McuClockSettingConfig_MCU_MCAN1 (1U)
#define McuConf_McuClockSettingConfig_MAIN_RTI_0 (2U)

/*</MCU_CFG_CLOCKUSERCONFIG_LIST>*/


/*********************************************************************************************************************
 * Exported Preprocessor #define Macros
 *********************************************************************************************************************/

/*********************************************************************************************************************
 * Exported Type Declarations
 *********************************************************************************************************************/

/* Requirements: SWS_Mcu_00252,SWS_Mcu_00234 */
typedef enum
{
    /* Requirements: SWS_Mcu_00134 */
    MCU_POWER_ON_RESET = 0,        
    MCU_WATCHDOG_RESET,            
    MCU_COLD_SW_RESET,             
    MCU_SW_RESET,                  
    MCU_DEBUG_RESET,               
    MCU_RESET_UNDEFINED,           
    MCU_RESET_CLEAR                
} Mcu_ResetType;



typedef enum
{
    MCU,
    MAIN,
    WKUP
} Mcu_DomainType;


typedef enum
{
    Adc,
    Gpio,
    Timer,
    Rti,
    Mcspi,
    Ecap,
    Ospi,
    Epwm,
    Cddipc,
    Mcan,
} Mcu_ModuleName;

typedef enum
{
    MCU_CLKSRC_MODULE_ID_MCU_ADC0 = 0,        
    MCU_CLKSRC_MODULE_ID_MCU_ADC1 = 1,        
    MCU_CLKSRC_MODULE_ID_WKUP_GPIO0 = 113,         
    MCU_CLKSRC_MODULE_ID_WKUP_GPIO1 = 114,             
    MCU_CLKSRC_MODULE_ID_MAIN_GPIO0 = 105,             
    MCU_CLKSRC_MODULE_ID_MAIN_GPIO1 = 106,        
    MCU_CLKSRC_MODULE_ID_MAIN_GPIO2 = 107,           
    MCU_CLKSRC_MODULE_ID_MAIN_GPIO3 = 108,       
    MCU_CLKSRC_MODULE_ID_MAIN_GPIO4 = 109,           
    MCU_CLKSRC_MODULE_ID_MAIN_GPIO5 = 110,            
    MCU_CLKSRC_MODULE_ID_MAIN_GPIO6 = 111,
    MCU_CLKSRC_MODULE_ID_MAIN_GPIO7 = 112,
    MCU_CLKSRC_MODULE_ID_MCU_TIMER0 = 35,
    MCU_CLKSRC_MODULE_ID_MCU_TIMER1 = 71,
    MCU_CLKSRC_MODULE_ID_MCU_TIMER2 = 72,
    MCU_CLKSRC_MODULE_ID_MCU_TIMER3 = 73,
    MCU_CLKSRC_MODULE_ID_MCU_TIMER4 = 74,
    MCU_CLKSRC_MODULE_ID_MCU_TIMER5 = 75,
    MCU_CLKSRC_MODULE_ID_MCU_TIMER6 = 76,
    MCU_CLKSRC_MODULE_ID_MCU_TIMER7 = 77,
    MCU_CLKSRC_MODULE_ID_MCU_TIMER8 = 78,
    MCU_CLKSRC_MODULE_ID_MCU_TIMER9 = 79,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER0 = 49,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER1 = 50,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER2 = 51,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER3 = 52,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER4 = 53,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER5 = 54,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER6 = 55,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER7 = 57,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER8 = 58,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER9 = 59,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER10 = 60,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER11 = 62,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER12 = 63,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER13 = 64,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER14 = 65,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER15 = 66,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER16 = 67,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER17 = 68,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER18 = 69,
    MCU_CLKSRC_MODULE_ID_MAIN_TIMER19 = 70,
    MCU_CLKSRC_MODULE_ID_MCU_RTI0 = 262,
    MCU_CLKSRC_MODULE_ID_MCU_RTI1 = 263,
    MCU_CLKSRC_MODULE_ID_MAIN_RTI0 = 252,
    MCU_CLKSRC_MODULE_ID_MAIN_RTI1 = 253,
    MCU_CLKSRC_MODULE_ID_MAIN_RTI24 = 254,
    MCU_CLKSRC_MODULE_ID_MAIN_RTI25 = 255,
    MCU_CLKSRC_MODULE_ID_MAIN_RTI16 = 256,
    MCU_CLKSRC_MODULE_ID_MAIN_RTI15 = 257,
    MCU_CLKSRC_MODULE_ID_MAIN_RTI28 = 258,
    MCU_CLKSRC_MODULE_ID_MAIN_RTI29 = 259,
    MCU_CLKSRC_MODULE_ID_MAIN_RTI30 = 260,
    MCU_CLKSRC_MODULE_ID_MAIN_RTI31 = 261,
    MCU_CLKSRC_MODULE_ID_MCU_MCSPI0 = 274,
    MCU_CLKSRC_MODULE_ID_MCU_MCSPI1 = 275,
    MCU_CLKSRC_MODULE_ID_MCU_MCSPI2 = 276,
    MCU_CLKSRC_MODULE_ID_MAIN_MCSPI0 = 266,
    MCU_CLKSRC_MODULE_ID_MAIN_MCSPI1 = 267,
    MCU_CLKSRC_MODULE_ID_MAIN_MCSPI2 = 268,
    MCU_CLKSRC_MODULE_ID_MAIN_MCSPI3 = 269,
    MCU_CLKSRC_MODULE_ID_MAIN_MCSPI4 = 270,
    MCU_CLKSRC_MODULE_ID_MAIN_MCSPI5 = 271,
    MCU_CLKSRC_MODULE_ID_MAIN_MCSPI6 = 272,
    MCU_CLKSRC_MODULE_ID_MAIN_MCSPI7 = 273,
    MCU_CLKSRC_MODULE_ID_MAIN_ECAP0 = 80,
    MCU_CLKSRC_MODULE_ID_MAIN_ECAP1 = 81,
    MCU_CLKSRC_MODULE_ID_MAIN_ECAP2 = 82,
    MCU_CLKSRC_MODULE_ID_MCU_OSPI0 = 103,
    MCU_CLKSRC_MODULE_ID_MCU_OSPI1 = 104,
    MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM0 = 83,
    MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM1 = 84,
    MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM2 = 85,
    MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM3 = 86,
    MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM4 = 87,
    MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM5 = 88,
    MCU_CLKSRC_MODULE_ID_MAILBOX0 = 214,
    MCU_CLKSRC_MODULE_ID_MCU_MCAN0 = 172,
    MCU_CLKSRC_MODULE_ID_MCU_MCAN1 = 173,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN0 = 156,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN1 = 158,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN2 = 160,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN3 = 161,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN4 = 162,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN5 = 163,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN6 = 164,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN7 = 165,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN8 = 166,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN9 = 167,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN10 = 168,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN11 = 169,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN12 = 170,
    MCU_CLKSRC_MODULE_ID_MAIN_MCAN13 = 171,
} Mcu_ClkModuleIdType;

typedef enum
{
    MCU_CLKSRC_0 = 0,
    MCU_CLKSRC_1,
    MCU_CLKSRC_2,
    MCU_CLKSRC_3,
    MCU_CLKSRC_4,
    MCU_CLKSRC_5,
    MCU_CLKSRC_6,
    MCU_CLKSRC_MAX
}Mcu_ClkSourceIdType;

/* Requirements: SWS_Mcu_00250,SWS_Mcu_00231 */
typedef enum
{
    MCU_PLL_LOCKED = 0,
    MCU_PLL_UNLOCKED,
    MCU_PLL_STATUS_UNDEFINED
} Mcu_PllStatusType;

typedef struct
{
    uint16  N;
    uint16  M2;
    uint16  FracM;
    uint16  sdDiv;
    uint64  MCU_PLL_CLKOUT;
    uint64  MCU_PLL_HSDIV0;
    uint64  MCU_PLL_HSDIV1;
    uint64  MCU_PLL_HSDIV2;
    uint64  MCU_PLL_HSDIV3;
} Mcu_PllClkDivType;

typedef struct
{
    Mcu_PllClkDivType Mcu_PllClk1;
    Mcu_PllClkDivType Mcu_PllClk2;
    Mcu_PllClkDivType Mcu_PllClk3;
} Mcu_PllConfigType;

/* Requirements : SWS_Mcu_00256 */
typedef enum
{
    MCU_RAMSTATE_INVALID,
    MCU_RAMSTATE_VALID
} Mcu_RamStateType;


/* Requirements: SWS_Mcu_00030 */
typedef struct
{
    P2VAR(uint8, AUTOMATIC, MCU_RAM_COPY) Mcu_RamSectionBaseAddress;
    uint8  Mcu_RamDefaultValue;
    uint32 Mcu_RamSectionBytes;
} Mcu_RamSectionConfigType;

typedef P2CONST (Mcu_RamSectionConfigType, AUTOMATIC, MCU_CONFIG_DATA)
                    Mcu_RamConfigPtrType;
                    
typedef enum
{
    MCU_CLKSRC_DPLL = 0,
    MCU_CLKSRC_APLL
} Mcu_PllSourceIdType;

typedef P2CONST (Mcu_PllConfigType, AUTOMATIC, MCU_CONFIG_DATA)
Mcu_PllConfigPtrType;

typedef P2FUNC (Std_ReturnType, AUTOMATIC, Mcu_CBKFunctionPtrType)
                               (uint32 moduleId, uint32 clkId, uint64 ParentId);

typedef struct
{
    uint32         rawresetval;
    Mcu_ResetType resetReason;
} Mcu_ResetStatusMap;


typedef struct
{
    uint8   numFields;
    const   Mcu_ResetStatusMap *resetMap;
} Mcu_ResetInfo;

extern CONST(Mcu_ResetStatusMap,
             MCU_CONST) Mcu_ResetStatusMapTbl[MCU_RESET_STATUS_NUMBER];
             
extern CONST(Mcu_ResetInfo, MCU_CONST) Mcu_ResetInfoTbl ;

extern const struct Mcu_ConfigType_s McuModuleConfiguration_0;

#ifdef __cplusplus
}
#endif

#endif /* #ifndef MCU_CFG_H */

/* @} */

/**********************************************************************************************************************
 *  End of File: Mcu_Cfg.h
 *********************************************************************************************************************/