MCUSW
Spi.h
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62 
116 /*
117  * Below are the global design requirements which are met by this SPI handler
118  * driver which can't be mapped to a particular source ID
119  */
120 /*
121  * Design: MCAL-6422,MCAL-6412,MCAL-6690,MCAL-6487,MCAL-6429,MCAL-6683,MCAL-6384,MCAL-6478,MCAL-6383,MCAL-6593,MCAL-6573,MCAL-6381,MCAL-6492,MCAL-6610,MCAL-6658,MCAL-6451,MCAL-6449,MCAL-6448,MCAL-6581,MCAL-6710,MCAL-6527,MCAL-6642,MCAL-6458,MCAL-6544
122  */
123 
124 /*
125  * Below are the SPI's module environment design requirements which can't be mapped
126  * to this driver.
127  */
128 /*
129  * Design: MCAL-6719,MCAL-6486,MCAL-6415,MCAL-6685,MCAL-6421,MCAL-6390,MCAL-6608,MCAL-6670,MCAL-6643
130  */
131 
132 #ifndef SPI_H_
133 #define SPI_H_
134 
135 /* ========================================================================== */
136 /* Include Files */
137 /* ========================================================================== */
138 #include "Std_Types.h"
139 #include "Spi_Cfg.h"
140 #if defined (SOC_J721E) || defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
141 #include <ti/drv/udma/udma.h>
142 #endif
143 #include "Spi/mcspi_hw/V0/mcspi.h"
144 
145 #ifdef __cplusplus
146 extern "C"
147 {
148 #endif
149 
150 /* ========================================================================== */
151 /* Macros & Typedefs */
152 /* ========================================================================== */
153 
161 #define SPI_SW_MAJOR_VERSION (9U)
162 
163 #define SPI_SW_MINOR_VERSION (0U)
164 
165 #define SPI_SW_PATCH_VERSION (0U)
166 /* @} */
167 
175 #define SPI_AR_RELEASE_MAJOR_VERSION (4U)
176 
177 #define SPI_AR_RELEASE_MINOR_VERSION (3U)
178 
179 #define SPI_AR_RELEASE_REVISION_VERSION (1U)
180 /* @} */
181 
187 #define SPI_VENDOR_ID ((uint16) 44U)
188 
189 #define SPI_MODULE_ID ((uint16) 83U)
190 
191 #define SPI_INSTANCE_ID ((uint8) 0U)
192 /* @} */
193 
199 #define SPI_IB (0U)
200 
201 #define SPI_EB (1U)
202 
203 #define SPI_IB_EB (2U)
204 /* @} */
205 
206 
208 /*
209  * Design: MCAL-6691,MCAL-6394,MCAL-6615
210  */
211 typedef uint8 Spi_DataBufferType;
216 /*
217  * Design: MCAL-6625,MCAL-6669
218  */
219 typedef uint16 Spi_NumberOfDataType;
221 /*
222  * Design: MCAL-6528,MCAL-6493,MCAL-6687
223  */
224 typedef uint8 Spi_ChannelType;
226 /*
227  * Design: MCAL-6457,MCAL-6689,MCAL-6728
228  */
229 typedef uint16 Spi_JobType;
231 /*
232  * Design: MCAL-6639,MCAL-6505,MCAL-6729
233  */
234 typedef uint8 Spi_SequenceType;
239 /*
240  * Design: MCAL-6655,MCAL-6682,MCAL-6707
241  */
242 typedef uint8 Spi_HWUnitType;
243 
250 #ifndef SPI_E_PARAM_CHANNEL
251 
252 #define SPI_E_PARAM_CHANNEL ((uint8) 0x0AU)
253 #endif
254 #ifndef SPI_E_PARAM_JOB
255 
256 #define SPI_E_PARAM_JOB ((uint8) 0x0BU)
257 #endif
258 #ifndef SPI_E_PARAM_SEQ
259 
260 #define SPI_E_PARAM_SEQ ((uint8) 0x0CU)
261 #endif
262 #ifndef SPI_E_PARAM_LENGTH
263 
264 #define SPI_E_PARAM_LENGTH ((uint8) 0x0DU)
265 #endif
266 #ifndef SPI_E_PARAM_UNIT
267 
268 #define SPI_E_PARAM_UNIT ((uint8) 0x0EU)
269 #endif
270 #ifndef SPI_E_PARAM_POINTER
271 
272 #define SPI_E_PARAM_POINTER ((uint8) 0x10U)
273 #endif
274 #ifndef SPI_E_UNINIT
275 
276 #define SPI_E_UNINIT ((uint8) 0x1AU)
277 #endif
278 #ifndef SPI_E_SEQ_PENDING
279 
280 #define SPI_E_SEQ_PENDING ((uint8) 0x2AU)
281 #endif
282 #ifndef SPI_E_SEQ_IN_PROCESS
283 
284 #define SPI_E_SEQ_IN_PROCESS ((uint8) 0x3AU)
285 #endif
286 #ifndef SPI_E_ALREADY_INITIALIZED
287 
291 #define SPI_E_ALREADY_INITIALIZED ((uint8) 0x4AU)
292 #endif
293 #ifndef SPI_E_SEQUENCE_NOT_OK
294 
295 #define SPI_E_SEQUENCE_NOT_OK ((uint8) 0x5AU)
296 #endif
297 
298 /* @} */
299 
308 #define SPI_SID_INIT ((uint8) 0x00U)
309 
310 #define SPI_SID_DEINIT ((uint8) 0x01U)
311 
312 #define SPI_SID_WRITE_IB ((uint8) 0x02U)
313 
314 #define SPI_SID_ASYNC_TRANSMIT ((uint8) 0x03U)
315 
316 #define SPI_SID_READ_IB ((uint8) 0x04U)
317 
318 #define SPI_SID_SETUP_EB ((uint8) 0x05U)
319 
320 #define SPI_SID_GET_STATUS ((uint8) 0x06U)
321 
322 #define SPI_SID_GET_JOB_RESULT ((uint8) 0x07U)
323 
324 #define SPI_SID_GET_SEQ_RESULT ((uint8) 0x08U)
325 
326 #define SPI_SID_GET_VERSION_INFO ((uint8) 0x09U)
327 
328 #define SPI_SID_SYNC_TRANSMIT ((uint8) 0x0AU)
329 
330 #define SPI_SID_GET_HW_UNIT_STATUS ((uint8) 0x0BU)
331 
332 #define SPI_SID_CANCEL ((uint8) 0x0CU)
333 
334 #define SPI_SID_SET_ASYNC_MODE ((uint8) 0x0DU)
335 
336 #define SPI_SID_MAINFUNCTION_HANDLING ((uint8) 0x10U)
337 /* @} */
338 
345 /*
346  * Design: MCAL-6699
347  */
348 #define SPI_MCSPI_FCLK (48000000U)
349 
358 #define SPI_CFG_ID_0 (0x01U)
359 
361 #define SPI_CFG_ID_1 (0x02U)
362 
363 #define SPI_CFG_ID_2 (0x04U)
364 
365 #define SPI_CFG_ID_3 (0x08U)
366 
367 #define SPI_CFG_ID_4 (0x10U)
368 
369 #define SPI_CFG_ID_5 (0x20U)
370 
371 #define SPI_CFG_ID_6 (0x40U)
372 /* @} */
373 
374 /* ========================================================================== */
375 /* Structures and Enums */
376 /* ========================================================================== */
377 
386 /*
387  * Design: MCAL-6531,MCAL-6648,MCAL-6537,MCAL-6574
388  */
389 typedef enum
390 {
393  SPI_IDLE = 1U,
395  SPI_BUSY = 2U
398 
403 /*
404  * Design: MCAL-6703,MCAL-6425,MCAL-6430
405  */
406 typedef enum
407 {
419 
424 /*
425  * Design: MCAL-6512,MCAL-6607,MCAL-6686
426  */
427 typedef enum
428 {
439 
444 typedef enum
445 {
453 
458 /*
459  * Design: MCAL-6502,MCAL-6659,MCAL-6420,MCAL-6475,MCAL-6419,MCAL-6517,MCAL-6641
460  */
461 typedef enum
462 {
471 
475 typedef enum
476 {
477  SPI_MSB = 0U,
479  SPI_LSB = 1U
482 
486 typedef enum
487 {
488  SPI_LOW = STD_LOW,
492 } Spi_LevelType;
493 
497 typedef enum
498 {
499  SPI_CS0 = 0U,
507 } Spi_CsPinType;
508 
513 typedef enum
514 {
515  SPI_CLK_MODE_0 = 0x00U,
517  SPI_CLK_MODE_1 = 0x01U,
519  SPI_CLK_MODE_2 = 0x02U,
521  SPI_CLK_MODE_3 = 0x03U,
523 } Spi_ClkMode;
524 
537 typedef enum
538 {
543 } Spi_TxRxMode;
544 
548 /*
549  * Design: MCAL-6597
550  */
551 typedef enum
552 {
562 
566 typedef enum
567 {
573 
578 typedef enum
579 {
589 
593 typedef enum
594 {
600 
604 typedef enum
605 {
615 
619 typedef enum
620 {
628 
636 typedef void (*Spi_CacheWbInv)(uint8 *BufPtr,
637  uint16 LenByte);
638 
646 typedef void (*Spi_CacheWb)(uint8 *BufPtr,
647  uint16 LenByte);
648 
656 typedef void (*Spi_CacheInv)(uint8 *BufPtr,
657  uint16 LenByte);
658 
662 /*
663  * Design: MCAL-6529,MCAL-6519,MCAL-6649,MCAL-6716,MCAL-6619
664  */
665 typedef struct
666 {
669  uint8 dataWidth;
688 
692 typedef struct
693 {
694  uint16 csEnable;
709  uint32 clkDivider;
729 
733 typedef struct
734 {
739 
743 /*
744  * Design: MCAL-6692,MCAL-6437,MCAL-6684,MCAL-6522,MCAL-6572,MCAL-6406,MCAL-6632,MCAL-6476
745  */
746 typedef struct
747 {
752  Spi_JobEndNotifyType Spi_JobEndNotification;
760 
764 /*
765  * Design: MCAL-6496,MCAL-6536,MCAL-6742,MCAL-6413
766  */
767 typedef struct
768 {
771  Spi_SeqEndNotifyType Spi_SequenceEndNotification;
773  uint32 jobPerSeq;
779 
783 typedef struct
784 {
787  boolean enabledmaMode;
794 
798 /*
799  * Design: MCAL-6570,MCAL-6423,MCAL-6588,MCAL-6485,MCAL-6733
800  */
801 typedef struct Spi_ConfigType_s
802 {
803  uint8 maxChannels;
806  uint8 maxJobs;
809  uint8 maxSeq;
812  uint8 maxHwUnit;
818  uint32 udmaInstId;
841 
845 typedef struct Spi_ChannelConfigType_PC_s
846 {
850 
851 /*
852  * Design: MCAL-6717,MCAL-6650
853  */
857 typedef struct Spi_JobConfigType_PC_s
858 {
867 
871 typedef struct Spi_SeqConfigType_PC_s
872 {
876 
877 #if (STD_ON == SPI_REGISTER_READBACK_API)
878 
882 typedef struct
883 {
884  /*
885  * McSPI related registers
886  */
887  uint32 mcspiHlRev;
893  uint32 mcspiRev;
897  uint32 mcspiSyst;
911 #endif /* #if (STD_ON == SPI_REGISTER_READBACK_API) */
912 /* @} */
913 /* @} */
914 /* ========================================================================== */
915 /* Function Declarations */
916 /* ========================================================================== */
917 
935 FUNC(void, SPI_CODE) Spi_Init(
936  P2CONST(Spi_ConfigType, AUTOMATIC, SPI_CONFIG_DATA) CfgPtr);
937 
958 FUNC(Std_ReturnType, SPI_CODE) Spi_DeInit(void);
959 
977 FUNC(Spi_StatusType, SPI_CODE) Spi_GetStatus(void);
978 
998 FUNC(Spi_JobResultType, SPI_CODE) Spi_GetJobResult(Spi_JobType Job);
999 
1022  Spi_SequenceType Sequence);
1023 
1024 #if (STD_ON == SPI_VERSION_INFO_API)
1025 
1045 FUNC(void, SPI_CODE) Spi_GetVersionInfo(
1046  P2VAR(Std_VersionInfoType, AUTOMATIC, SPI_APPL_DATA) versioninfo);
1047 #endif /* #if (STD_ON == SPI_VERSION_INFO_API) */
1048 
1049 #if (STD_ON == SPI_HW_STATUS_API)
1050 
1071 FUNC(Spi_StatusType, SPI_CODE) Spi_GetHWUnitStatus(Spi_HWUnitType HWUnit);
1072 #endif /* #if (STD_ON == SPI_HW_STATUS_API) */
1073 
1074 #if ((SPI_CHANNELBUFFERS == SPI_IB) || (SPI_CHANNELBUFFERS == SPI_IB_EB))
1075 
1103 FUNC(Std_ReturnType, SPI_CODE) Spi_WriteIB(
1104  Spi_ChannelType Channel,
1105  P2CONST(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DataBufferPtr);
1106 
1132 FUNC(Std_ReturnType, SPI_CODE) Spi_ReadIB(
1133  Spi_ChannelType Channel,
1134  P2VAR(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DataBufferPointer);
1135 #endif /* #if SPI_IB || SPI_IB_EB */
1136 
1137 #if ((SPI_CHANNELBUFFERS == SPI_EB) || (SPI_CHANNELBUFFERS == SPI_IB_EB))
1138 
1170 FUNC(Std_ReturnType, SPI_CODE) Spi_SetupEB(
1171  Spi_ChannelType Channel,
1172  P2CONST(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) SrcDataBufferPtr,
1173  P2VAR(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DesDataBufferPtr,
1174  Spi_NumberOfDataType Length);
1175 #endif /* #if ((SPI_CHANNELBUFFERS == SPI_EB) || (SPI_CHANNELBUFFERS ==
1176  *SPI_IB_EB)) */
1177 
1178 #if ((SPI_SCALEABILITY == SPI_LEVEL_1) || (SPI_SCALEABILITY == \
1179  SPI_LEVEL_2))
1180 
1200 FUNC(Std_ReturnType, SPI_CODE) Spi_AsyncTransmit(Spi_SequenceType Sequence);
1201 #endif /* #if ((SPI_SCALEABILITY == SPI_LEVEL_1) ||
1202  *(SPI_SCALEABILITY == SPI_LEVEL_2)) */
1203 
1204 #if (STD_ON == SPI_CANCEL_API)
1205 
1223 FUNC(void, SPI_CODE) Spi_Cancel(Spi_SequenceType Sequence);
1224 #endif /* #if (STD_ON == SPI_CANCEL_API) */
1225 
1226 #if ((SPI_SCALEABILITY == SPI_LEVEL_0) || (SPI_SCALEABILITY == \
1227  SPI_LEVEL_2))
1228 
1248 FUNC(Std_ReturnType, SPI_CODE) Spi_SyncTransmit(Spi_SequenceType Sequence);
1249 #endif /* #if ((SPI_SCALEABILITY == SPI_LEVEL_0) ||
1250  *(SPI_SCALEABILITY == SPI_LEVEL_2)) */
1251 
1252 #if (SPI_SCALEABILITY == SPI_LEVEL_2)
1253 
1275 FUNC(Std_ReturnType, SPI_CODE) Spi_SetAsyncMode(Spi_AsyncModeType Mode);
1276 #endif /* #if (SPI_SCALEABILITY == SPI_LEVEL_2) */
1277 
1300 FUNC(void, SPI_CODE) Spi_MainFunction_Handling(void);
1301 
1302 #if (STD_ON == SPI_REGISTER_READBACK_API)
1303 
1332 FUNC(Std_ReturnType, SPI_CODE) Spi_RegisterReadback(
1333  Spi_HWUnitType HWUnit,
1334  P2VAR(Spi_RegisterReadbackType, AUTOMATIC, SPI_APPL_DATA) RegRbPtr);
1335 #endif /* #if (STD_ON == SPI_REGISTER_READBACK_API) */
1336 
1337 #if (STD_ON == SPI_SAFETY_API)
1338 
1356 FUNC(Std_ReturnType, SPI_CODE) Spi_dataOverflowUnderflowIntrEnable(
1357  Spi_HWUnitType HWUnit, uint32 intFlags );
1358 
1378 FUNC(Std_ReturnType, SPI_CODE) Spi_dataOverflowUnderflowIntrDisable(
1379  Spi_HWUnitType HWUnit, uint32 intFlags);
1380 
1401  Spi_HWUnitType HWUnit, uint32 intFlags);
1402 
1422 FUNC(Std_ReturnType, SPI_CODE) Spi_dataOverflowUnderflowIntrStatusClear(
1423  Spi_HWUnitType HWUnit, uint32 intFlags);
1424 
1425 #endif /* #if (STD_ON == SPI_SAFETY_API) */
1426 
1427 #ifdef __cplusplus
1428 }
1429 #endif
1430 
1431 #endif /* #ifndef SPI_H_ */
1432 
1433 /* @} */
Definition: Spi.h:479
SPI Sequence configuration structure.
Definition: Spi.h:767
uint8 Spi_SequenceType
Specifies the identification (ID) for a sequence of jobs.
Definition: Spi.h:234
Definition: Spi.h:606
Definition: Spi.h:539
Std_ReturnType Spi_RegisterReadback(Spi_HWUnitType HWUnit, Spi_RegisterReadbackType *RegRbPtr)
This function reads the important registers of the hardware unit and returns the value in the structu...
Spi_SeqEndNotifyType Spi_SequenceEndNotification
Definition: Spi.h:771
Std_ReturnType Spi_SyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
Spi_SeqResultType Spi_GetSequenceResult(Spi_SequenceType Sequence)
This service returns the last transmission result of the specified Sequence.
#define SPI_MAX_JOBS
Maximum jobs across all sequence/hwunit.
Definition: Spi_Cfg.h:182
void(* Spi_CacheInv)(uint8 *BufPtr, uint16 LenByte)
Cache invalidate function.
Definition: Spi.h:656
Spi_JobPriorityType jobPriority
Definition: Spi.h:748
Definition: Spi.h:584
Spi_AsyncModeType
Specifies the asynchronous mechanism mode for SPI busses handled asynchronously in LEVEL 2.
Definition: Spi.h:461
Spi_DataLineTransmitType transmissionLineEnable
Definition: Spi.h:726
Definition: Spi.h:501
#define SPI_MAX_CHANNELS_PER_JOB
Maximum channels allowed per job.
Definition: Spi_Cfg.h:173
Definition: Spi.h:448
Spi_StatusType Spi_GetHWUnitStatus(Spi_HWUnitType HWUnit)
This service returns the status of the specified SPI Hardware microcontroller peripheral.
Spi_NumberOfDataType maxBufLength
Definition: Spi.h:674
void(* Spi_CacheWb)(uint8 *BufPtr, uint16 LenByte)
Cache write-back function.
Definition: Spi.h:646
Std_ReturnType Spi_WriteIB(Spi_ChannelType Channel, const Spi_DataBufferType *DataBufferPtr)
Service for writing one or more data to an IB SPI Handler/Driver Channel specified by parameter.
uint8 externalDeviceCfgId
Definition: Spi.h:863
Spi_CacheWb cacheWb
Definition: Spi.h:826
Definition: Spi.h:610
void Spi_GetVersionInfo(Std_VersionInfoType *versioninfo)
This service returns the version information of this module.
Spi_JobResultType
This type defines a range of specific Jobs status for SPI Handler/Driver.
Definition: Spi.h:406
Spi_CsPinType
SPI Chip Select Pin.
Definition: Spi.h:497
Spi_TxRxMode
SPI TX/RX Mode.
Definition: Spi.h:537
uint8 Spi_HWUnitType
Specifies the identification (ID) for a SPI Hardware micro controller peripheral (unit)
Definition: Spi.h:242
#define SPI_MAX_HW_UNIT
Maximum HW unit - This should match the sum for the below units ISR which are ON.
Definition: Spi_Cfg.h:191
Mcspi_IrqStatusType
Irq status and std return type.
Definition: Spi.h:619
boolean enabledmaMode
Definition: Spi.h:787
Std_ReturnType Spi_dataOverflowUnderflowIntrDisable(Spi_HWUnitType HWUnit, uint32 intFlags)
This function Disable Under/Overflow Interupts of the hardware unit and returns the status.
Spi_DataDelayType
Spi_DataDelayType defines the number of interface clock cycles between CS toggling and first or last ...
Definition: Spi.h:578
Definition: Spi.h:612
Std_ReturnType Spi_SetAsyncMode(Spi_AsyncModeType Mode)
Service to set the asynchronous mechanism mode for SPI busses handled asynchronously.
Spi_HWUnitType hwUnitId
Definition: Spi.h:785
Definition: Spi.h:431
uint16 Spi_NumberOfDataType
Type for defining the number of data elements of the type Spi_DataBufferType to send and / or receive...
Definition: Spi.h:219
Definition: Spi.h:519
Definition: Spi.h:625
Definition: Spi.h:490
Definition: Spi.h:553
uint8 Spi_DataBufferType
Type of application data buffer elements.
Definition: Spi.h:211
SPI channel config structure parameters Pre-Compile only.
Definition: Spi.h:845
uint32 clkDivider
Definition: Spi.h:709
uint32 defaultTxData
Definition: Spi.h:672
#define SPI_MAX_JOBS_PER_SEQ
Maximum jobs allowed per sequence.
Definition: Spi_Cfg.h:176
uint32 udmaInstId
Definition: Spi.h:818
Definition: Spi.h:521
Definition: Spi.h:595
Definition: Spi.h:503
uint32 mcspiCh3config
Definition: Spi.h:906
Spi_CsModeType
SPI Chip Select Mode.
Definition: Spi.h:566
Definition: Spi.h:623
uint16 Spi_JobType
Specifies the identification (ID) for a Job.
Definition: Spi.h:229
Spi_SeqResultType
This type defines a range of specific Sequences status for SPI Handler/Driver.
Definition: Spi.h:427
Spi_HwUnitResultType
This type defines a range of specific HW unit status for SPI Handler/Driver.
Definition: Spi.h:444
#define SPI_MAX_CHANNELS
Maximum channels across all jobs/sequence/hwunit.
Definition: Spi_Cfg.h:179
SPI job config structure parameters Pre-Compile only.
Definition: Spi.h:857
SPI sequence config structure parameters Pre-Compile only.
Definition: Spi.h:871
Definition: Spi.h:608
Spi_TransferType transferType
Definition: Spi.h:684
uint32 mcspiRev
Definition: Spi.h:893
Definition: Spi.h:488
Mcspi_IrqStatusType Spi_dataOverflowUnderflowIntrGetStatus(Spi_HWUnitType HWUnit, uint32 intFlags)
This function status Under/Overflow Interupts of the hardware unit and returns the status.
uint16 startBitEnable
Definition: Spi.h:719
uint32 mcspiHlSysConfig
Definition: Spi.h:891
SPI Hardware unit configuration structure.
Definition: Spi.h:783
Definition: Spi.h:391
Spi_CacheWbInv cacheWbInv
Definition: Spi.h:824
Definition: Spi.h:410
uint8 dataWidth
Definition: Spi.h:669
Definition: Spi.h:499
Spi_ChannelType channelId
Definition: Spi.h:847
Definition: Spi.h:395
Spi_StatusType Spi_GetStatus(void)
Service returns the SPI Handler/Driver software module status.
Spi_CsModeType csMode
Definition: Spi.h:696
Definition: Spi.h:586
Definition: Spi.h:580
uint32 dmaTxChIntrNum
Definition: Spi.h:789
Std_ReturnType Spi_dataOverflowUnderflowIntrStatusClear(Spi_HWUnitType HWUnit, uint32 intFlags)
This function status clear Under/Overflow Interupts of the hardware unit and returns the status.
Spi_ClkMode clkMode
Definition: Spi.h:715
void(* Spi_CacheWbInv)(uint8 *BufPtr, uint16 LenByte)
Cache write-back invalidate function.
Definition: Spi.h:636
uint8 maxExtDevCfg
Definition: Spi.h:815
Spi_LevelType csPolarity
Definition: Spi.h:699
Definition: Spi.h:515
Spi_DataLineReceiveType receptionLineEnable
Definition: Spi.h:724
This file contains generated pre compile configuration file for SPI MCAL driver.
uint32 mcspiIrqenable
Definition: Spi.h:908
#define SPI_MAX_EXT_DEV
Maximum external device cfg.
Definition: Spi_Cfg.h:196
Definition: Spi.h:559
Spi_DataDelayType csIdleTime
Definition: Spi.h:701
Spi_McspiExternalDeviceConfigType mcspi
Definition: Spi.h:735
Definition: Spi.h:415
Definition: Spi.h:570
Std_ReturnType Spi_DeInit(void)
Service for SPI de-initialization.
void Spi_Init(const Spi_ConfigType *CfgPtr)
Service for SPI initialization.
uint8 maxSeq
Definition: Spi.h:809
Definition: Spi.h:446
Spi_LevelType startBitLevel
Definition: Spi.h:722
void Spi_Cancel(Spi_SequenceType Sequence)
Service cancels the specified on-going sequence transmission.
uint32 mcspiModulctrl
Definition: Spi.h:899
Definition: Spi.h:477
uint8 maxHwUnit
Definition: Spi.h:812
#define SPI_MAX_SEQ
Maximum sequence across all hwunit.
Definition: Spi_Cfg.h:185
Spi_CacheInv cacheInv
Definition: Spi.h:828
Spi_StatusType
This type defines a range of specific status for SPI Handler/Driver.
Definition: Spi.h:389
Std_ReturnType Spi_dataOverflowUnderflowIntrEnable(Spi_HWUnitType HWUnit, uint32 intFlags)
This function Enable Under/Overflow Interupts of the hardware unit and returns the status.
Definition: Spi.h:621
uint32 channelPerJob
Definition: Spi.h:754
Definition: Spi.h:541
Definition: Spi.h:436
uint32 mcspiCh0config
Definition: Spi.h:903
Definition: Spi.h:568
uint32 mcspiSysConfig
Definition: Spi.h:901
uint8 seqInterruptible
Definition: Spi.h:769
SPI register readback structure.
Definition: Spi.h:882
uint32 jobPerSeq
Definition: Spi.h:773
Definition: Spi.h:393
Spi_ClkMode
SPI Clock Mode - sets the clock polarity and phase. Note: These values are a direct register mapping....
Definition: Spi.h:513
Definition: Spi.h:429
Definition: Spi.h:582
Definition: Spi.h:517
uint32 mcspiHlRev
Definition: Spi.h:887
Spi_HWUnitType hwUnitId
Definition: Spi.h:750
uint32 mcspiSyst
Definition: Spi.h:897
Spi_TxRxMode txRxMode
Definition: Spi.h:717
SPI external device specific configuration structure .
Definition: Spi.h:733
Definition: Spi.h:450
uint32 dmaRxChIntrNum
Definition: Spi.h:791
uint8 maxChannels
Definition: Spi.h:803
Definition: Spi.h:434
SPI Job configuration structure specific to McSPI peripheral.
Definition: Spi.h:692
Std_ReturnType Spi_ReadIB(Spi_ChannelType Channel, Spi_DataBufferType *DataBufferPointer)
Service for reading synchronously one or more data from an IB SPI Handler/Driver Channel specified by...
Definition: Spi.h:408
Definition: Spi.h:557
Spi_JobType jobId
Definition: Spi.h:859
Definition: Spi.h:505
SPI Job configuration structure.
Definition: Spi.h:746
Definition: Spi.h:597
Definition: Spi.h:466
Spi_LevelType
Type for SPI Chip Select Polarity and Clock Idle Level.
Definition: Spi.h:486
Spi_JobEndNotifyType Spi_JobEndNotification
Definition: Spi.h:752
Spi_DataLineTransmitType
Spi_DataLineTransmitType defines the lines selected for transmission.
Definition: Spi.h:604
Definition: Spi.h:413
uint32 mcspiSysStatus
Definition: Spi.h:895
Spi_CsPinType csPin
Definition: Spi.h:861
uint32 mcspiHlHwInfo
Definition: Spi.h:889
Spi_JobPriorityType
SPI Job Priority.
Definition: Spi.h:551
Spi_DataLineReceiveType
Spi_DataLineReceiveType defines the lines selected for reception.
Definition: Spi.h:593
uint8 Spi_ChannelType
Specifies the identification (ID) for a Channel.
Definition: Spi.h:224
void Spi_MainFunction_Handling(void)
This function polls the SPI interrupts linked to HW Units allocated to the transmission of SPI sequen...
SPI Channel configuration structure.
Definition: Spi.h:665
Spi_SequenceType seqId
Definition: Spi.h:873
Std_ReturnType Spi_AsyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
uint8 channelBufType
Definition: Spi.h:667
Definition: Spi.h:463
Definition: Spi.h:555
uint32 mcspiCh2config
Definition: Spi.h:905
uint16 csEnable
Definition: Spi.h:694
Spi_TransferType
Word transfer order - MSB first or LSB first.
Definition: Spi.h:475
Spi_JobResultType Spi_GetJobResult(Spi_JobType Job)
This service returns the last transmission result of the specified Job.
SPI config structure.
Definition: Spi.h:801
uint8 maxJobs
Definition: Spi.h:806
uint32 mcspiCh1config
Definition: Spi.h:904