Introduction

This modules define APIs to capture video data using video ports in CSIRX. This module can be used for single channel capture as well as multi-channel capture.

Data Structures
struct	dataTypeInfo
	This structure contains information about data type and bpp. More...

struct	CsirxDrv_QueObj
	Structure defining the queue object used in queue/dequeue operation. Instead of creating frame objects, this is used so that any other information could be queued/dequeued along with the frame. Already qElem is added to avoid dynamic allocation of Queue nodes. More...

struct	CsirxDrv_BufManObj
	Structure to store the buffer management functionality variables. More...

struct	CsirxDrv_ChObj
	CSIRX Driver Channel Object. More...

struct	CsirxDrv_CslObj
	CSIRX CSL-FL instance Object. More...

struct	CsirxDrv_InstObj
	CSIRX Driver Instance Object. More...

struct	CsirxDrv_VirtContext

struct	CsirxDrv_CommonObj

Macros
#define	CSIRX_DRV_TRPD_SIZE ((sizeof(CSL_UdmapTR15) * 2U) + 4U)
	UDMA TR packet descriptor memory. This contains the CSL_UdmapCppi5TRPD + Padding to sizeof(CSL_UdmapTR15) + one Type_15 TR (CSL_UdmapTR15) + one TR response of 4 bytes. Since CSL_UdmapCppi5TRPD is less than CSL_UdmapTR15, size is just two times CSL_UdmapTR15 for alignment. More...

#define	CSIRX_DRV_RING_ENTRY_SIZE (sizeof(uint64_t))
	Size (in bytes) of each ring entry (Size of pointer - 64-bit) More...

#define	CSIRX_DRV_RING_MEM_SIZE
	Total ring memory. More...

#define	CSIRX_DRV_RING_MEM_SIZE_ALIGN ((CSIRX_DRV_RING_MEM_SIZE + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))
	This ensures every channel memory is aligned. More...

#define	CSIRX_DRV_TRPD_SIZE_ALIGN ((CSIRX_DRV_TRPD_SIZE + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))
	This ensures every channel memory is aligned. More...

#define	CSIRX_DRV_DEF_PSIL_THREAD_ID ((uint32_t) 0xFFU)
	PSIL Default thread ID. More...

#define	CSIRX_DRV_FRAME_DROP_TRPD_NUM ((uint32_t) 2U)
	Number TRPD for Frame Drop Programming. More...

#define	CSIRX_DRV_TR_LOG_CNT (1000U)
	Number of entries to log for TR Submit debug. More...

CSIRX DRV State
Represents the state of the CSIRX Driver state.
#define	CSIRX_DRV_STATE_IDLE ((uint32_t)0U)
	Driver is not open and is idle. More...

#define	CSIRX_DRV_STATE_CREATED ((uint32_t)1U)
	Driver is created. More...

#define	CSIRX_DRV_STATE_DO_START ((uint32_t)2U)
	Driver is requesting a start. More...

#define	CSIRX_DRV_STATE_RUNNING ((uint32_t)3U)
	Driver is running. More...

#define	CSIRX_DRV_STATE_DO_STOP ((uint32_t)4U)
	Driver is requesting a stop. More...

#define	CSIRX_DRV_STATE_STOPPED ((uint32_t)5U)
	Driver is stopped. More...

#define	CSIRX_DRV_STATE_UNINIT ((uint32_t)6U)
	Driver is un-initialized. More...

CSIRX DRV Channel State
Represents the state of the CSIRX channel state.
#define	CSIRX_DRV_CH_STATE_IDLE ((uint32_t)0U)
	Channel is not open and is idle. More...

#define	CSIRX_DRV_CH_STATE_CREATED ((uint32_t)1U)
	Channel is created. More...

#define	CSIRX_DRV_CH_STATE_RUNNING ((uint32_t)2U)
	Channel is running. More...

#define	CSIRX_DRV_CH_STATE_STOPPED ((uint32_t)3U)
	Channel is stopped. More...

#define	CSIRX_DRV_CH_STATE_STOPPING ((uint32_t)4U)
	Channel is stopping. More...

CSIRX Usage status
Usage status for module of CSI RX DRV.
#define	CSIRX_DRV_USAGE_STATUS_NOT_USED ((uint32_t) 0xDEADBABEU)
	Usage Status: Not used. More...

#define	CSIRX_DRV_USAGE_STATUS_IN_USE ((uint32_t) 0xABCDEF01U)
	Usage Status: In use. More...

Queue object type.
Type of queue object/trpd .
#define	CSIRX_DRV_Q_OBJ_TYPE_NORMAL ((uint32_t) 0xDEADBABEU)
	Normal: This object/trpd belong to normal/queued frame by application. More...

#define	CSIRX_DRV_Q_OBJ_TYPE_FD ((uint32_t) 0xABCDEF01U)
	Normal: This object/trpd belong to frame drop buffer. More...

CSIRX Bits per pixel
Number of bits per pixel for a given format.
Fdrv_Handle	CsirxDrv_create (uint32_t drvId, uint32_t instId, void createArgs, void createStatusArgs, const Fvid2_DrvCbParams *fdmCbParams)

int32_t	CsirxDrv_delete (Fdrv_Handle handle, void *reserved)

int32_t	CsirxDrv_queue (Fdrv_Handle handle, Fvid2_FrameList *frmList, uint32_t streamId)

int32_t	CsirxDrv_dequeue (Fdrv_Handle handle, Fvid2_FrameList *frmList, uint32_t streamId, uint32_t timeout)

int32_t	CsirxDrv_control (Fdrv_Handle handle, uint32_t cmd, void cmdArgs, void cmdStatusArgs)

uint32_t	CsirxDrv_getBpp (uint32_t dt)

uint32_t	CsirxDrv_getStorageBpp (uint32_t dt)

#define	CSIRX_BITS_PER_PIXEL_8_BITS ((uint32_t) 8U)
	Bit/pixel: 8 bits/pixel. More...

#define	CSIRX_BITS_PER_PIXEL_12_BITS ((uint32_t) 12U)
	Bit/pixel: 12 bits/pixel. More...

#define	CSIRX_BITS_PER_PIXEL_16_BITS ((uint32_t) 16U)
	Bit/pixel: 16 bits/pixel. More...

#define	CSIRX_BITS_PER_PIXEL_32_BITS ((uint32_t) 32U)
	Bit/pixel: 32 bits/pixel. More...

#define	CSIRX_BITS_PER_PIXEL_64_BITS ((uint32_t) 64U)
	Bit/pixel: 64 bits/pixel. More...

Macro Definition Documentation

◆ CSIRX_DRV_STATE_IDLE

#define CSIRX_DRV_STATE_IDLE ((uint32_t)0U)

Driver is not open and is idle.

◆ CSIRX_DRV_STATE_CREATED

#define CSIRX_DRV_STATE_CREATED ((uint32_t)1U)

Driver is created.

◆ CSIRX_DRV_STATE_DO_START

#define CSIRX_DRV_STATE_DO_START ((uint32_t)2U)

Driver is requesting a start.

◆ CSIRX_DRV_STATE_RUNNING

#define CSIRX_DRV_STATE_RUNNING ((uint32_t)3U)

Driver is running.

◆ CSIRX_DRV_STATE_DO_STOP

#define CSIRX_DRV_STATE_DO_STOP ((uint32_t)4U)

Driver is requesting a stop.

◆ CSIRX_DRV_STATE_STOPPED

#define CSIRX_DRV_STATE_STOPPED ((uint32_t)5U)

Driver is stopped.

◆ CSIRX_DRV_STATE_UNINIT

#define CSIRX_DRV_STATE_UNINIT ((uint32_t)6U)

Driver is un-initialized.

◆ CSIRX_DRV_CH_STATE_IDLE

#define CSIRX_DRV_CH_STATE_IDLE ((uint32_t)0U)

Channel is not open and is idle.

◆ CSIRX_DRV_CH_STATE_CREATED

#define CSIRX_DRV_CH_STATE_CREATED ((uint32_t)1U)

Channel is created.

◆ CSIRX_DRV_CH_STATE_RUNNING

#define CSIRX_DRV_CH_STATE_RUNNING ((uint32_t)2U)

Channel is running.

◆ CSIRX_DRV_CH_STATE_STOPPED

#define CSIRX_DRV_CH_STATE_STOPPED ((uint32_t)3U)

Channel is stopped.

◆ CSIRX_DRV_CH_STATE_STOPPING

#define CSIRX_DRV_CH_STATE_STOPPING ((uint32_t)4U)

Channel is stopping.

◆ CSIRX_DRV_TRPD_SIZE

#define CSIRX_DRV_TRPD_SIZE ((sizeof(CSL_UdmapTR15) * 2U) + 4U)

UDMA TR packet descriptor memory. This contains the CSL_UdmapCppi5TRPD + Padding to sizeof(CSL_UdmapTR15) + one Type_15 TR (CSL_UdmapTR15) + one TR response of 4 bytes. Since CSL_UdmapCppi5TRPD is less than CSL_UdmapTR15, size is just two times CSL_UdmapTR15 for alignment.

◆ CSIRX_DRV_RING_ENTRY_SIZE

#define CSIRX_DRV_RING_ENTRY_SIZE (sizeof(uint64_t))

Size (in bytes) of each ring entry (Size of pointer - 64-bit)

◆ CSIRX_DRV_RING_MEM_SIZE

#define CSIRX_DRV_RING_MEM_SIZE

Value:

(CSIRX_CAPT_QUEUE_DEPTH_PER_CH * \

CSIRX_DRV_RING_ENTRY_SIZE)

CSIRX_CAPT_QUEUE_DEPTH_PER_CH

#define CSIRX_CAPT_QUEUE_DEPTH_PER_CH

Default max number of frames that can be queued per capture driver instance.

Definition: csirx_cfg.h:81

Total ring memory.

◆ CSIRX_DRV_RING_MEM_SIZE_ALIGN

#define CSIRX_DRV_RING_MEM_SIZE_ALIGN ((CSIRX_DRV_RING_MEM_SIZE + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))

This ensures every channel memory is aligned.

◆ CSIRX_DRV_TRPD_SIZE_ALIGN

#define CSIRX_DRV_TRPD_SIZE_ALIGN ((CSIRX_DRV_TRPD_SIZE + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))

This ensures every channel memory is aligned.

◆ CSIRX_DRV_DEF_PSIL_THREAD_ID

#define CSIRX_DRV_DEF_PSIL_THREAD_ID ((uint32_t) 0xFFU)

PSIL Default thread ID.

◆ CSIRX_DRV_FRAME_DROP_TRPD_NUM

#define CSIRX_DRV_FRAME_DROP_TRPD_NUM ((uint32_t) 2U)

Number TRPD for Frame Drop Programming.

◆ CSIRX_DRV_USAGE_STATUS_NOT_USED

#define CSIRX_DRV_USAGE_STATUS_NOT_USED ((uint32_t) 0xDEADBABEU)

Usage Status: Not used.

◆ CSIRX_DRV_USAGE_STATUS_IN_USE

#define CSIRX_DRV_USAGE_STATUS_IN_USE ((uint32_t) 0xABCDEF01U)

Usage Status: In use.

◆ CSIRX_DRV_Q_OBJ_TYPE_NORMAL

#define CSIRX_DRV_Q_OBJ_TYPE_NORMAL ((uint32_t) 0xDEADBABEU)

Normal: This object/trpd belong to normal/queued frame by application.

◆ CSIRX_DRV_Q_OBJ_TYPE_FD

#define CSIRX_DRV_Q_OBJ_TYPE_FD ((uint32_t) 0xABCDEF01U)

Normal: This object/trpd belong to frame drop buffer.

◆ CSIRX_DRV_TR_LOG_CNT

#define CSIRX_DRV_TR_LOG_CNT (1000U)

Number of entries to log for TR Submit debug.

◆ CSIRX_BITS_PER_PIXEL_8_BITS

#define CSIRX_BITS_PER_PIXEL_8_BITS ((uint32_t) 8U)

Bit/pixel: 8 bits/pixel.

◆ CSIRX_BITS_PER_PIXEL_12_BITS

#define CSIRX_BITS_PER_PIXEL_12_BITS ((uint32_t) 12U)

Bit/pixel: 12 bits/pixel.

◆ CSIRX_BITS_PER_PIXEL_16_BITS

#define CSIRX_BITS_PER_PIXEL_16_BITS ((uint32_t) 16U)

Bit/pixel: 16 bits/pixel.

◆ CSIRX_BITS_PER_PIXEL_32_BITS

#define CSIRX_BITS_PER_PIXEL_32_BITS ((uint32_t) 32U)

Bit/pixel: 32 bits/pixel.

◆ CSIRX_BITS_PER_PIXEL_64_BITS

#define CSIRX_BITS_PER_PIXEL_64_BITS ((uint32_t) 64U)

Bit/pixel: 64 bits/pixel.

Function Documentation

◆ CsirxDrv_create()

Fdrv_Handle CsirxDrv_create	(	uint32_t	drvId,
		uint32_t	instId,
		void *	createArgs,
		void *	createStatusArgs,
		const Fvid2_DrvCbParams *	fdmCbParams
	)

◆ CsirxDrv_delete()

int32_t CsirxDrv_delete	(	Fdrv_Handle	handle,
		void *	reserved
	)

◆ CsirxDrv_queue()

int32_t CsirxDrv_queue	(	Fdrv_Handle	handle,
		Fvid2_FrameList *	frmList,
		uint32_t	streamId
	)

◆ CsirxDrv_dequeue()

int32_t CsirxDrv_dequeue	(	Fdrv_Handle	handle,
		Fvid2_FrameList *	frmList,
		uint32_t	streamId,
		uint32_t	timeout
	)

◆ CsirxDrv_control()

int32_t CsirxDrv_control	(	Fdrv_Handle	handle,
		uint32_t	cmd,
		void *	cmdArgs,
		void *	cmdStatusArgs
	)

◆ CsirxDrv_getBpp()

uint32_t CsirxDrv_getBpp ( uint32_t dt )

◆ CsirxDrv_getStorageBpp()

uint32_t CsirxDrv_getStorageBpp ( uint32_t dt )