PDK API Guide for J721E
CLEC - Compute cluster Event Controller

Introduction

Files

file  csl_clec.h
 This is the include file for the CLEC CSL-FL module.
 

Data Structures

struct  CSL_ClecEventConfig
 This structure contains the parameters to setup a event. More...
 

Functions

int32_t CSL_clecConfigEvent (CSL_CLEC_EVTRegs *pRegs, uint32_t evtNum, const CSL_ClecEventConfig *evtCfg)
 This API sets the event configuration. More...
 
int32_t CSL_clecSendEvent (CSL_CLEC_EVTRegs *pRegs, uint32_t evtNum)
 This API sends the event specified if the event send is enabled in the event configuration (evtSendEnable) and the output event generated depends on the rtMap, extEvtNum and c7xEvtNum. More...
 
int32_t CSL_clecClearEvent (CSL_CLEC_EVTRegs *pRegs, uint32_t evtNum)
 This API clear any level interrupt set for the event. More...
 
int32_t CSL_clecConfigEventLevel (CSL_CLEC_EVTRegs *pRegs, uint32_t evtNum, uint32_t is_level)
 This API does a set or clear of the is_lvl field in CLEC.MRR register. More...
 
int32_t CSL_clecGetSecureClaimStatus (CSL_CLEC_EVTRegs *pRegs, uint32_t evtNum, uint32_t *secureClaim)
 This API reads the Secure Claim bit field in CLEC.MRR register. More...
 

Variables

typedef __attribute__
 UInteger224 (802.1AS, 10.3.4 time-synchronization spanning tree priority vectors ) More...
 

Macros

#define CSL_CLEC_MAX_EVT_IN   (2047U)
 Maximum number of input events supported by CLEC. This is just the maximum registers supported for programming. The actual event supported depends on the SOC. More...
 
#define CSL_CLEC_MAX_EXT_EVT_OUT   (128U)
 Maximum external events. More...
 
#define CSL_CLEC_MAX_C7X_EVT_OUT   (64U)
 Maximum C7x events. More...
 

CLEC route map - Determines where the event will be routed.

Note: All the cores may not be present in a particular SOC. The CSL-FL is provided to support the IP feature and hence all possible setting is provided. Also the meaning of each core is SOC dependent. Refer to SOC information to know the exact mapping.

#define CSL_CLEC_RTMAP_DISABLE   ((uint32_t)((uint32_t) 0x0001U) << 0U)
 Send event to None. More...
 
#define CSL_CLEC_RTMAP_SYS   ((uint32_t)((uint32_t) 0x0001U) << 1U)
 Send event to SOC as Compute Cluster interrupt output. More...
 
#define CSL_CLEC_RTMAP_CPU_0   ((uint32_t)((uint32_t) 0x0000U) << 2U)
 Send event to CPU 0 - Typically reserved for ARM. More...
 
#define CSL_CLEC_RTMAP_CPU_1   ((uint32_t)((uint32_t) 0x0001U) << 2U)
 Send event to CPU 1 - Typically reserved for ARM. More...
 
#define CSL_CLEC_RTMAP_CPU_2   ((uint32_t)((uint32_t) 0x0002U) << 2U)
 Send event to CPU 2 - Typically reserved for ARM. More...
 
#define CSL_CLEC_RTMAP_CPU_3   ((uint32_t)((uint32_t) 0x0003U) << 2U)
 Send event to CPU 3 - Typically reserved for ARM. More...
 
#define CSL_CLEC_RTMAP_CPU_4   ((uint32_t)((uint32_t) 0x0004U) << 2U)
 Send event to CPU 4 - Typically C7x core starts from this. More...
 
#define CSL_CLEC_RTMAP_CPU_5   ((uint32_t)((uint32_t) 0x0005U) << 2U)
 Send event to CPU 5. More...
 
#define CSL_CLEC_RTMAP_CPU_6   ((uint32_t)((uint32_t) 0x0006U) << 2U)
 Send event to CPU 6. More...
 
#define CSL_CLEC_RTMAP_CPU_7   ((uint32_t)((uint32_t) 0x0007U) << 2U)
 Send event to CPU 7. More...
 
#define CSL_CLEC_RTMAP_CPU_8   ((uint32_t)((uint32_t) 0x0008U) << 2U)
 Send event to CPU 8. More...
 
#define CSL_CLEC_RTMAP_CPU_9   ((uint32_t)((uint32_t) 0x0009U) << 2U)
 Send event to CPU 9. More...
 
#define CSL_CLEC_RTMAP_CPU_10   ((uint32_t)((uint32_t) 0x000AU) << 2U)
 Send event to CPU 10. More...
 
#define CSL_CLEC_RTMAP_CPU_ALL   ((uint32_t)((uint32_t) 0x000FU) << 2U)
 Send event to All CPU. More...
 

Macro Definition Documentation

◆ CSL_CLEC_MAX_EVT_IN

#define CSL_CLEC_MAX_EVT_IN   (2047U)

Maximum number of input events supported by CLEC. This is just the maximum registers supported for programming. The actual event supported depends on the SOC.

◆ CSL_CLEC_MAX_EXT_EVT_OUT

#define CSL_CLEC_MAX_EXT_EVT_OUT   (128U)

Maximum external events.

◆ CSL_CLEC_MAX_C7X_EVT_OUT

#define CSL_CLEC_MAX_C7X_EVT_OUT   (64U)

Maximum C7x events.

◆ CSL_CLEC_RTMAP_DISABLE

#define CSL_CLEC_RTMAP_DISABLE   ((uint32_t)((uint32_t) 0x0001U) << 0U)

Send event to None.

◆ CSL_CLEC_RTMAP_SYS

#define CSL_CLEC_RTMAP_SYS   ((uint32_t)((uint32_t) 0x0001U) << 1U)

Send event to SOC as Compute Cluster interrupt output.

◆ CSL_CLEC_RTMAP_CPU_0

#define CSL_CLEC_RTMAP_CPU_0   ((uint32_t)((uint32_t) 0x0000U) << 2U)

Send event to CPU 0 - Typically reserved for ARM.

◆ CSL_CLEC_RTMAP_CPU_1

#define CSL_CLEC_RTMAP_CPU_1   ((uint32_t)((uint32_t) 0x0001U) << 2U)

Send event to CPU 1 - Typically reserved for ARM.

◆ CSL_CLEC_RTMAP_CPU_2

#define CSL_CLEC_RTMAP_CPU_2   ((uint32_t)((uint32_t) 0x0002U) << 2U)

Send event to CPU 2 - Typically reserved for ARM.

◆ CSL_CLEC_RTMAP_CPU_3

#define CSL_CLEC_RTMAP_CPU_3   ((uint32_t)((uint32_t) 0x0003U) << 2U)

Send event to CPU 3 - Typically reserved for ARM.

◆ CSL_CLEC_RTMAP_CPU_4

#define CSL_CLEC_RTMAP_CPU_4   ((uint32_t)((uint32_t) 0x0004U) << 2U)

Send event to CPU 4 - Typically C7x core starts from this.

◆ CSL_CLEC_RTMAP_CPU_5

#define CSL_CLEC_RTMAP_CPU_5   ((uint32_t)((uint32_t) 0x0005U) << 2U)

Send event to CPU 5.

◆ CSL_CLEC_RTMAP_CPU_6

#define CSL_CLEC_RTMAP_CPU_6   ((uint32_t)((uint32_t) 0x0006U) << 2U)

Send event to CPU 6.

◆ CSL_CLEC_RTMAP_CPU_7

#define CSL_CLEC_RTMAP_CPU_7   ((uint32_t)((uint32_t) 0x0007U) << 2U)

Send event to CPU 7.

◆ CSL_CLEC_RTMAP_CPU_8

#define CSL_CLEC_RTMAP_CPU_8   ((uint32_t)((uint32_t) 0x0008U) << 2U)

Send event to CPU 8.

◆ CSL_CLEC_RTMAP_CPU_9

#define CSL_CLEC_RTMAP_CPU_9   ((uint32_t)((uint32_t) 0x0009U) << 2U)

Send event to CPU 9.

◆ CSL_CLEC_RTMAP_CPU_10

#define CSL_CLEC_RTMAP_CPU_10   ((uint32_t)((uint32_t) 0x000AU) << 2U)

Send event to CPU 10.

◆ CSL_CLEC_RTMAP_CPU_ALL

#define CSL_CLEC_RTMAP_CPU_ALL   ((uint32_t)((uint32_t) 0x000FU) << 2U)

Send event to All CPU.

Function Documentation

◆ CSL_clecConfigEvent()

int32_t CSL_clecConfigEvent ( CSL_CLEC_EVTRegs *  pRegs,
uint32_t  evtNum,
const CSL_ClecEventConfig evtCfg 
)

This API sets the event configuration.

Parameters
pRegs[IN] CLEC register base.
evtNum[IN] CLEC event number 0 to (CSL_CLEC_MAX_EVT_IN - 1).
evtCfg[IN] Pointer to event configuration.
Returns
CSL_ErrType_t

◆ CSL_clecSendEvent()

int32_t CSL_clecSendEvent ( CSL_CLEC_EVTRegs *  pRegs,
uint32_t  evtNum 
)

This API sends the event specified if the event send is enabled in the event configuration (evtSendEnable) and the output event generated depends on the rtMap, extEvtNum and c7xEvtNum.

Parameters
pRegs[IN] CLEC register base.
evtNum[IN] CLEC event number 0 to (CSL_CLEC_MAX_EVT_IN - 1).
Returns
CSL_ErrType_t

◆ CSL_clecClearEvent()

int32_t CSL_clecClearEvent ( CSL_CLEC_EVTRegs *  pRegs,
uint32_t  evtNum 
)

This API clear any level interrupt set for the event.

Parameters
pRegs[IN] CLEC register base.
evtNum[IN] CLEC event number 0 to (CSL_CLEC_MAX_EVT_IN - 1).
Returns
CSL_ErrType_t

◆ CSL_clecConfigEventLevel()

int32_t CSL_clecConfigEventLevel ( CSL_CLEC_EVTRegs *  pRegs,
uint32_t  evtNum,
uint32_t  is_level 
)

This API does a set or clear of the is_lvl field in CLEC.MRR register.

Parameters
pRegs[IN] CLEC register base.
evtNum[IN] CLEC event number 0 to (CSL_CLEC_MAX_EVT_IN - 1).
is_level[IN] 0: is_lvl field is set to 0, i.e pulse interrupt, 1: is_lvl field is set to 1, i.e level interrupt
Returns
CSL_ErrType_t

◆ CSL_clecGetSecureClaimStatus()

int32_t CSL_clecGetSecureClaimStatus ( CSL_CLEC_EVTRegs *  pRegs,
uint32_t  evtNum,
uint32_t *  secureClaim 
)

This API reads the Secure Claim bit field in CLEC.MRR register.

Parameters
pRegs[IN] CLEC register base.
evtNum[IN] CLEC event number 0 to (CSL_CLEC_MAX_EVT_IN - 1).
secureClaim[OUT] pointer to Secure Claim Status.
Returns
CSL_ErrType_t

Variable Documentation

◆ __attribute__

UInteger224 (802.1AS, 10.3.4 time-synchronization spanning tree priority vectors )

data type to be used in IPC.

gptp clock data.

grand master port data. this structure formed with following details:

to retreive netlink status. this structure has nlstatus type of gptpipc_data_netlinnk_t. for more details read

gptp ipc client request data. this structure formed with following details:

gptp ipc client request, register/deregister abnormal event.

  1. subcmd -> 0: register, 1:deregister
  2. msgtype -> use the same number as PTPMsgType, -1 means all types for deregister subcmd
  3. eventtype -> use the same number as md_abn_event_type
  4. eventrate -> rate of event happening, 0.0 to 1.0
  5. repeat -> repeat times of the event
  6. interval -> interval times whtn it has repeat number
  7. eventpara -> integer parameter for the event
  1. cmd -> it is used for give command to IPC.
  2. domainNumber -> integer used for domain number.
  3. domainIndex -> integer used for domain index.
  4. portNumber -> integer used for port index.
    See also
    gptp_ipc_command_t
    gptpipc_data_netlink_t
  1. domainNumber -> used to hold domain number of clock.
  2. portIndex -> integer used to hold port index of clock.
  3. asCapable -> this port in tis time-awaer system can interoperate to the other end of port via the IEEE 802.1AS protocol.
  4. portOper -> True if the port is up and able to send and receive messages.
  5. gmClockId -> If gmPresent is TRUE, gmClockId is the ClockIdentity of the current grandmaster. If gmPresent is FALSE, the value of gmIdentity is 0x0.
  6. annPathSequenceCount -> number of path sequence to grand master
  7. annPathSequence -> array of path sequence to grand master
  1. domainNumber -> The domain number of a gPTP domain
  2. portIndex -> index number of the clock port
  3. lastGmPhaseChange_nsec -> the most recent change in timeBaseIndicator
  4. clockId -> the clock identiy of this clock port
  5. gmClockId -> the clock identiy of the current grand master clock
  6. lastSyncReceiptTime_nsec ->
  7. lastSyncReceiptLocalTime_nsec ->
  8. adjppb -> adjustment value
  9. gmTimeBaseIndicator -> timeBaseIndicator of the current grand master
  10. lastSyncSeqID -> sequence number of the last Sync/FollowUp received
  11. gmsync -> True if synchronized to grand master
  12. domainActive -> True if this domain is providing the gptp clock
  13. lastGmFreqChangePk -> the last