PDK API Guide for J721E

Introduction

Data Structures

struct  CSL_EmifMemEccCfg
 Emif ECC configuration structure. More...
 
struct  CSL_EmifConfig
 EMIF configuration structure. More...
 
struct  CSL_ECCErrorInfo
 Emif ECC Error Information structure. More...
 

Macros

#define CSL_EMIF_ECC_MAX_REGIONS   3
 
#define ECC_1B_ERR_ADR_LOG_REG_SHIFT   6
 ECC_1B_ERR_ADR_LOG_REG_SHIFT For SOC_J7200, ECC_1B_ERR_ADR_LOG_REG expects a 32-byte aligned address whereas the other SOCs expects a 64-byte aligned address. More...
 
#define ECC_2B_ERR_ADR_LOG_REG_SHIFT   6
 ECC_2B_ERR_ADR_LOG_REG_SHIFT For SOC_J7200, ECC_2B_ERR_ADR_LOG_REG expects a 32-byte aligned address whereas the other SOCs expects a 64-byte aligned address. More...
 

Macro Definition Documentation

◆ CSL_EMIF_ECC_MAX_REGIONS

#define CSL_EMIF_ECC_MAX_REGIONS   3

◆ ECC_1B_ERR_ADR_LOG_REG_SHIFT

#define ECC_1B_ERR_ADR_LOG_REG_SHIFT   6

ECC_1B_ERR_ADR_LOG_REG_SHIFT For SOC_J7200, ECC_1B_ERR_ADR_LOG_REG expects a 32-byte aligned address whereas the other SOCs expects a 64-byte aligned address.

◆ ECC_2B_ERR_ADR_LOG_REG_SHIFT

#define ECC_2B_ERR_ADR_LOG_REG_SHIFT   6

ECC_2B_ERR_ADR_LOG_REG_SHIFT For SOC_J7200, ECC_2B_ERR_ADR_LOG_REG expects a 32-byte aligned address whereas the other SOCs expects a 64-byte aligned address.