Introduction

Files
file	i2c.h
	This file contains the function prototypes for the device abstraction layer for high speed I2C. It also contains some related macro definitions and some files to be included.

Macros
#define	I2C_CFG_MST_TX
	I2C_CFG_MST_TX - Master transmit mode. More...

#define	I2C_CFG_MST_RX ((uint32_t) I2C_CON_MST_MASK)
	I2C_CFG_MST_RX - Matter receive mode. More...

#define	I2C_CFG_STOP ((uint32_t) I2C_CON_STP_MASK)
	I2C_CFG_STOP - Stop condition. More...

#define	I2C_CFG_N0RMAL_MODE ((uint32_t) 0 << I2C_CON_STB_SHIFT)
	I2C_CFG_N0RMAL_MODE - Normal mode. More...

#define	I2C_CFG_SRT_BYTE_MODE ((uint32_t) I2C_CON_STB_MASK)
	I2C_CFG_SRT_BYTE_MODE - Start byte mode. More...

#define	I2C_CFG_7BIT_SLAVE_ADDR ((uint32_t) 0 << I2C_CON_XSA_SHIFT)
	I2C_CFG_7BIT_SLAVE_ADDR - 7 bit slave address. More...

#define	I2C_CFG_10BIT_SLAVE_ADDR ((uint32_t) I2C_CON_XSA_MASK)
	I2C_CFG_10BIT_SLAVE_ADDR - 10 bit slave address. More...

#define	I2C_CFG_10BIT_OWN_ADDR_0 ((uint32_t) I2C_CON_XOA0_MASK)
	I2C_CFG_10BIT_OWN_ADDR_0 - Master mode 10 bit own address 0. More...

#define	I2C_CFG_10BIT_OWN_ADDR_1 ((uint32_t) I2C_CON_XOA1_MASK)
	I2C_CFG_10BIT_OWN_ADDR_1 - Master mode 10 bit own address 1. More...

#define	I2C_CFG_10BIT_OWN_ADDR_2 ((uint32_t) I2C_CON_XOA2_MASK)
	I2C_CFG_10BIT_OWN_ADDR_2 - Master mode 10 bit own address 2. More...

#define	I2C_CFG_10BIT_OWN_ADDR_3 ((uint32_t) I2C_CON_XOA3_MASK)
	I2C_CFG_10BIT_OWN_ADDR_3 - Master mode 10 bit own address 3. More...

#define	I2C_CFG_7BIT_OWN_ADDR_0 ((uint32_t) 0 << I2C_CON_XOA0_SHIFT)
	I2C_CFG_7BIT_OWN_ADDR_0 - Master mode 7 bit own address 0. More...

#define	I2C_CFG_7BIT_OWN_ADDR_1 ((uint32_t) 0 << I2C_CON_XOA1_SHIFT)
	I2C_CFG_7BIT_OWN_ADDR_1 - Master mode 7 bit own address 1. More...

#define	I2C_CFG_7BIT_OWN_ADDR_2 ((uint32_t) 0 << I2C_CON_XOA2_SHIFT)
	I2C_CFG_7BIT_OWN_ADDR_2 - Master mode 7 bit own address 2. More...

#define	I2C_CFG_7BIT_OWN_ADDR_3 ((uint32_t) 0 << I2C_CON_XOA3_SHIFT)
	I2C_CFG_7BIT_OWN_ADDR_3 - Master mode 7 bit own address 3. More...

#define	I2C_CFG_MST_ENABLE ((uint32_t) I2C_CON_I2C_EN_MASK)
	I2C_CFG_MST_ENABLE - I2C module enable. More...

#define	I2C_CFG_START ((uint32_t) I2C_CON_STT_MASK)
	I2C_CFG_START - Start condition, initiate I2C transfer. More...

#define	I2C_CFG_MST ((uint32_t) I2C_CON_MST_MASK)
	I2C_CFG_MST - I2C configure master mode. More...

#define	I2C_CFG_HS_MOD ((uint32_t) CSL_I2C_CON_OPMODE_HSI2C << CSL_I2C_CON_OPMODE_SHIFT)
	I2C_CFG_HS_MODE - High speed operation mode. More...

Macro Definition Documentation

◆ I2C_CFG_MST_TX

#define I2C_CFG_MST_TX

Value:

(((uint32_t) I2C_CON_TRX_MASK) | \

(uint32_t) (I2C_CON_MST_MASK))

I2C_CFG_MST_TX - Master transmit mode.

◆ I2C_CFG_MST_RX

#define I2C_CFG_MST_RX ((uint32_t) I2C_CON_MST_MASK)

I2C_CFG_MST_RX - Matter receive mode.

◆ I2C_CFG_STOP

#define I2C_CFG_STOP ((uint32_t) I2C_CON_STP_MASK)

I2C_CFG_STOP - Stop condition.

◆ I2C_CFG_N0RMAL_MODE

#define I2C_CFG_N0RMAL_MODE ((uint32_t) 0 << I2C_CON_STB_SHIFT)

I2C_CFG_N0RMAL_MODE - Normal mode.

◆ I2C_CFG_SRT_BYTE_MODE

#define I2C_CFG_SRT_BYTE_MODE ((uint32_t) I2C_CON_STB_MASK)

I2C_CFG_SRT_BYTE_MODE - Start byte mode.

◆ I2C_CFG_7BIT_SLAVE_ADDR

#define I2C_CFG_7BIT_SLAVE_ADDR ((uint32_t) 0 << I2C_CON_XSA_SHIFT)

I2C_CFG_7BIT_SLAVE_ADDR - 7 bit slave address.

◆ I2C_CFG_10BIT_SLAVE_ADDR

#define I2C_CFG_10BIT_SLAVE_ADDR ((uint32_t) I2C_CON_XSA_MASK)

I2C_CFG_10BIT_SLAVE_ADDR - 10 bit slave address.

◆ I2C_CFG_10BIT_OWN_ADDR_0

#define I2C_CFG_10BIT_OWN_ADDR_0 ((uint32_t) I2C_CON_XOA0_MASK)

I2C_CFG_10BIT_OWN_ADDR_0 - Master mode 10 bit own address 0.

◆ I2C_CFG_10BIT_OWN_ADDR_1

#define I2C_CFG_10BIT_OWN_ADDR_1 ((uint32_t) I2C_CON_XOA1_MASK)

I2C_CFG_10BIT_OWN_ADDR_1 - Master mode 10 bit own address 1.

◆ I2C_CFG_10BIT_OWN_ADDR_2

#define I2C_CFG_10BIT_OWN_ADDR_2 ((uint32_t) I2C_CON_XOA2_MASK)

I2C_CFG_10BIT_OWN_ADDR_2 - Master mode 10 bit own address 2.

◆ I2C_CFG_10BIT_OWN_ADDR_3

#define I2C_CFG_10BIT_OWN_ADDR_3 ((uint32_t) I2C_CON_XOA3_MASK)

I2C_CFG_10BIT_OWN_ADDR_3 - Master mode 10 bit own address 3.

◆ I2C_CFG_7BIT_OWN_ADDR_0

#define I2C_CFG_7BIT_OWN_ADDR_0 ((uint32_t) 0 << I2C_CON_XOA0_SHIFT)

I2C_CFG_7BIT_OWN_ADDR_0 - Master mode 7 bit own address 0.

◆ I2C_CFG_7BIT_OWN_ADDR_1

#define I2C_CFG_7BIT_OWN_ADDR_1 ((uint32_t) 0 << I2C_CON_XOA1_SHIFT)

I2C_CFG_7BIT_OWN_ADDR_1 - Master mode 7 bit own address 1.

◆ I2C_CFG_7BIT_OWN_ADDR_2

#define I2C_CFG_7BIT_OWN_ADDR_2 ((uint32_t) 0 << I2C_CON_XOA2_SHIFT)

I2C_CFG_7BIT_OWN_ADDR_2 - Master mode 7 bit own address 2.

◆ I2C_CFG_7BIT_OWN_ADDR_3

#define I2C_CFG_7BIT_OWN_ADDR_3 ((uint32_t) 0 << I2C_CON_XOA3_SHIFT)

I2C_CFG_7BIT_OWN_ADDR_3 - Master mode 7 bit own address 3.

◆ I2C_CFG_MST_ENABLE

#define I2C_CFG_MST_ENABLE ((uint32_t) I2C_CON_I2C_EN_MASK)

I2C_CFG_MST_ENABLE - I2C module enable.

◆ I2C_CFG_START

#define I2C_CFG_START ((uint32_t) I2C_CON_STT_MASK)

I2C_CFG_START - Start condition, initiate I2C transfer.

◆ I2C_CFG_MST

#define I2C_CFG_MST ((uint32_t) I2C_CON_MST_MASK)

I2C_CFG_MST - I2C configure master mode.

◆ I2C_CFG_HS_MOD

#define I2C_CFG_HS_MOD ((uint32_t) CSL_I2C_CON_OPMODE_HSI2C << CSL_I2C_CON_OPMODE_SHIFT)

I2C_CFG_HS_MODE - High speed operation mode.