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PDK API Guide for J721E
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Functions | |
void | CSL_ospiEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable) |
This function enables/disables the OSPI By definition, target can handle read/write transaction as long as it is enabled. More... | |
void | CSL_ospiDacEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable) |
This function enables/disables the OSPI Direct Access Controller. More... | |
void | CSL_ospiXipEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable) |
This function enables/disables the OSPI XIP Controller. More... | |
void | CSL_ospiSetModeBits (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t flashModeVal) |
This function sets the Mode bits which are sent to the device following address. More... | |
void | CSL_ospiPhyEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable) |
This function enables/disables the OSPI PHY mode. More... | |
void | CSL_ospiPipelinePhyEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable) |
This function enables/disables the OSPI pipeline PHY mode. More... | |
void | CSL_ospiDtrEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable) |
This function enables/disables the OSPI DTR protocol. More... | |
void | CSL_ospiSetPreScaler (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t clkDividerVal) |
Set the OSPI clock register divider value. More... | |
void | CSL_ospiSetClkMode (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t clkMode) |
This function configures the OSPI to work in different clock modes. More... | |
void | CSL_ospiSetChipSelect (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t chipSelect, uint32_t decSelect) |
This function configures the chip select polarity for a selected chip select. This can only be done if OSPI module is not busy. More... | |
void | CSL_ospiSetDevDelay (const CSL_ospi_flash_cfgRegs *pRegs, const uint32_t *delays) |
This function configures the device delays This can only be done if OSPI controller is idle. More... | |
void | CSL_ospiSetDevSize (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t numAddrBytes, uint32_t pageSize, uint32_t blkSize) |
Set device size configrations. More... | |
void | CSL_ospiSetIndTrigAddr (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t indTrigAddr) |
Set Indirect Trigger Address. More... | |
void | CSL_ospiSetWrCompAutoPolling (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t pollingState) |
Set write completion auto polling configuration. More... | |
void | CSL_ospiSetPollingDummyCycles (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t dummyCycles) |
Set write completion auto polling configuration. More... | |
void | CSL_ospiSetSramPartition (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t partition) |
Set SRAM partition configuration. More... | |
void | CSL_ospiIntrEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t intrFlag, uint32_t enable) |
This Function enables/diables only specified OSPI interrupts. More... | |
uint32_t | CSL_ospiIntrStatus (const CSL_ospi_flash_cfgRegs *pRegs) |
This function returns the status of interrupts. It specifies whether an interrupt is active or inactive. After an interrupt is serviced, the software must set to 0 the corresponding flag in the interrupt status register. More... | |
void | CSL_ospiIntrClear (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t intrFlag) |
This Function clears the status of specified interrupts. More... | |
uint32_t | CSL_ospiGetSramLvl (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t read) |
This Function gets the OSPI SRAM FIFO fill level bytes. More... | |
int32_t | CSL_ospiCmdRead (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t cmd, uint32_t rxLen) |
Read operation in config mode. More... | |
int32_t | CSL_ospiCmdExtRead (const CSL_ospi_flash_cfgRegs *pRegs, const uint8_t *cmdBuf, uint32_t cmdLen, uint32_t rxLen, uint32_t dummyCycles) |
Extended opcode read operation in config mode. More... | |
int32_t | CSL_ospiCmdWrite (const CSL_ospi_flash_cfgRegs *pRegs, const uint8_t *cmdBuf, uint32_t cmdLen, const uint8_t *txBuf, uint32_t txLen) |
Write operation in config mode. More... | |
void | CSL_ospiConfigRead (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t cmd, uint32_t mode, uint32_t dummyClk) |
Setup read operation transfer mode. More... | |
void | CSL_ospiIndReadExecute (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t rxLen) |
Execute read operation in indirect transfer mode. More... | |
void | CSL_ospiClrIndReadComplete (const CSL_ospi_flash_cfgRegs *pRegs) |
Clear indirect read operation done status. More... | |
uint32_t | CSL_ospiIndReadComplete (const CSL_ospi_flash_cfgRegs *pRegs) |
Check if indirect read operation is done. More... | |
void | CSL_ospiReadFifoData (uintptr_t indAddr, uint8_t *dest, uint32_t rdLen) |
Read data from the SRAM FIFO. More... | |
void | CSL_ospiWriteSetup (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t cmd, uint32_t mode) |
Setup write operation transfer mode. More... | |
uint32_t | CSL_ospiIsIndWriteComplete (const CSL_ospi_flash_cfgRegs *pRegs) |
Check if indirect write operation is done. More... | |
void | CSL_ospiClrIndWriteComplete (const CSL_ospi_flash_cfgRegs *pRegs) |
Clear indirect write operation done status. More... | |
void | CSL_ospiIndWriteExecute (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t txLen) |
Execute write operation in indirect transfer mode. More... | |
void | CSL_ospiIndWriteCancel (const CSL_ospi_flash_cfgRegs *pRegs) |
Cancel write operation in indirect transfer mode. More... | |
void | CSL_ospiWriteFifoData (uintptr_t indAddr, const uint8_t *src, uint32_t wrLen) |
Write data to the SRAM FIFO. More... | |
void | CSL_ospiLoopbackClkEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable) |
Enable the adapted loopback clock circuit. More... | |
uint32_t | CSL_ospiIsIdle (const CSL_ospi_flash_cfgRegs *pRegs) |
Check if OSPI is idle or not. More... | |
void | CSL_ospiFlashExecCmd (const CSL_ospi_flash_cfgRegs *pRegs) |
Excecute the flash read/write command. More... | |
uint32_t | CSL_ospiFlashExecCmdComplete (const CSL_ospi_flash_cfgRegs *pRegs) |
Check the flash command execution status. More... | |
void | CSL_ospiConfigPhy (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t lockCycle, uint32_t masterDelay, const uint32_t *pSlaveDelay) |
Configure the PHY. More... | |
void | CSL_ospiFlashStig (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t cmd, uint32_t addr, uint32_t data) |
Set configurations for a flash STIG command. More... | |
void | CSL_ospiIndSetStartAddr (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t startAddr, uint32_t read) |
Configure the read or wrtie start address in Indirect mode. More... | |
void | CSL_ospiSetDataReadCapDelay (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t delay) |
Set the read data capture delay. More... | |
void | CSL_ospiSetCsSotDelay (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t delay) |
Set the Chip Select Start of Transfer delay. More... | |
void | CSL_ospiSetDualByteOpcodeMode (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t opcodeMode) |
Set the dual byte opcode mode. More... | |
uint32_t | CSL_ospiGetDualByteOpcodeMode (const CSL_ospi_flash_cfgRegs *pRegs) |
Get the dual byte opcode mode. More... | |
void | CSL_ospiExtOpcodeSet (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t opcodeLo, uint32_t opcodeUp) |
Set the dual byte opcode parameters. More... | |
void | CSL_ospiExtOpcodeGet (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t *opcodeLo, uint32_t *opcodeUp) |
Get the dual byte opcode parameters. More... | |
void | CSL_ospiConfigPhyDLL (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t txDelay, uint32_t rxDelay, uint32_t opMode, uint32_t lockCycle, uint32_t funcClk) |
Configure the PHY TX/RX DLL delays. More... | |
void | CSL_ospiPhyResyncDll (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t lockCycle) |
Resync the PHY DLLs after configuring the TX delays. More... | |
void CSL_ospiEnable | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | enable | ||
) |
This function enables/disables the OSPI By definition, target can handle read/write transaction as long as it is enabled.
pRegs | [IN] OSPI flash config register base. |
enable | [IN] TRUE: enable OSPI to handle read/write transaction FALSE: disable OSPI once current transaction of the data word is complete |
none |
void CSL_ospiDacEnable | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | enable | ||
) |
This function enables/disables the OSPI Direct Access Controller.
pRegs | [IN] OSPI flash config register base. |
enable | [IN] TRUE: enable OSPI DAC, FALSE: disable OSPI DAC |
none |
void CSL_ospiXipEnable | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | enable | ||
) |
This function enables/disables the OSPI XIP Controller.
pRegs | [IN] OSPI flash config register base. |
enable | [IN] TRUE: enable OSPI XIP, FALSE: disable OSPI XIP |
none |
void CSL_ospiSetModeBits | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | flashModeVal | ||
) |
This function sets the Mode bits which are sent to the device following address.
pRegs | [IN] OSPI flash config register base. |
flashModeVal | [IN] Mode bit value to be set |
none |
void CSL_ospiPhyEnable | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | enable | ||
) |
This function enables/disables the OSPI PHY mode.
pRegs | [IN] OSPI flash config register base. |
enable | [IN] TRUE: enable OSPI PHY mode FALSE: disable OSPI PHY mode |
none |
void CSL_ospiPipelinePhyEnable | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | enable | ||
) |
This function enables/disables the OSPI pipeline PHY mode.
Enable PHY Pipeline when user needs to read at least four AHB 4-byte-sized words (16 bytes) in a sequential manner. Hence PHY is supported only when either DMA or Cache is enabled in the system.
pRegs | [IN] OSPI flash config register base. |
enable | [IN] TRUE: enable OSPI pipeline PHY mode FALSE: disable OSPI pipeline PHY mode |
none |
void CSL_ospiDtrEnable | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | enable | ||
) |
This function enables/disables the OSPI DTR protocol.
pRegs | [IN] OSPI flash config register base. |
enable | [IN] TRUE: enable OSPI DTR protocol FALSE: disable OSPI DTR protocol |
none |
void CSL_ospiSetPreScaler | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | clkDividerVal | ||
) |
Set the OSPI clock register divider value.
This function sets the OSPI clock control register with serial data clock divider ratio (DCLK_DIV) according to the input clock provided and the output clock required. DCLK_DIV = ((input clock) / (output clock)) - 1. This function also enables the clock for OSPI module. This can only be done if OSPI module is not busy.
pRegs | [IN] OSPI flash config register base. |
clkDividerVal | [IN] clock divider value to be set. |
none |
void CSL_ospiSetClkMode | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | clkMode | ||
) |
This function configures the OSPI to work in different clock modes.
The combination of Clock phase and clock polarity creates the SPI mode. Most serial flash devices support only mode 0 and mode 3. Changing the clock polarity also swaps the transmit/receive clock edge relationship. If a slave device states that it receives data on the rising edge and transmits on the falling edge of the clock, then it can only support mode 0 or 3. This can only be done if OSPI module is not busy.
The 4 possible modes are :
CKP CKPH Description 0 0 Data input captured on rising edge of ospi1_sclk clock. Data output generated on falling edge of ospi1_sclk clock 0 1 Data input captured on falling edge of ospi1_sclk clock. Data output generate on rising edge of ospi1_sclk clock 1 0 Data input captured on falling edge of ospi1_sclk clock. Data output generated on rising edge of ospi1_sclk clock 1 1 Data input captured on rising edge of ospi1_sclk clock. Data output generated on falling edge of ospi1_sclk clock
pRegs | [IN] OSPI flash config register base. |
clkMode | [IN] Mode required to be selected. Supported values given by CSL_OspiClkMode_t |
none |
void CSL_ospiSetChipSelect | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | chipSelect, | ||
uint32_t | decSelect | ||
) |
This function configures the chip select polarity for a selected chip select. This can only be done if OSPI module is not busy.
pRegs | [IN] OSPI flash config register base. |
chipSelect | [IN] Peripheral chip select lines. Supported values are according to CSL_OspiChipSelect_t. |
decSelect | [IN] Peripheral select decode. Supported values are according to CSL_OspiDecSelect_t. |
none |
void CSL_ospiSetDevDelay | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
const uint32_t * | delays | ||
) |
This function configures the device delays This can only be done if OSPI controller is idle.
pRegs | [IN] OSPI flash config register base. |
delays | [IN] Pointer to the device delay array |
none |
void CSL_ospiSetDevSize | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | numAddrBytes, | ||
uint32_t | pageSize, | ||
uint32_t | blkSize | ||
) |
Set device size configrations.
This function configures the number af Address Bytes, device page size and block size. This can only be done if OSPI module is not busy.
pRegs | [IN] OSPI flash config register base. |
numAddrBytes | [IN] Number of Address bytes to be sent for memory mapped protocol translator. Supported values are given by CSL_OspiMemMapNumAddrBytes_t. |
pageSize | [IN] Device page size in bytes. |
blkSize | [IN] Device block size in bytes. |
none |
void CSL_ospiSetIndTrigAddr | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | indTrigAddr | ||
) |
Set Indirect Trigger Address.
This function sets the base address that will be used by the AHB controller. This can only be done if OSPI module is not busy.
pRegs | [IN] OSPI flash config register base. |
indTrigAddr | [IN] Indirect Trigger Address, base address used by the AHB controller. |
none |
void CSL_ospiSetWrCompAutoPolling | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | pollingState | ||
) |
Set write completion auto polling configuration.
This function configures the write compltion auto polling state. This can only be done if OSPI module is not busy.
pRegs | [IN] OSPI flash config register base. |
pollingState | [IN] Auto polling state. Supported values are given by CSL_OspiWriteCompAutoPolling_t. |
none |
void CSL_ospiSetPollingDummyCycles | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | dummyCycles | ||
) |
Set write completion auto polling configuration.
This function configures the write compltion auto polling state. This can only be done if OSPI module is not busy.
pRegs | [IN] OSPI flash config register base. |
dummyCycles | [IN] number of dummy cycles required for a read ID |
none |
void CSL_ospiSetSramPartition | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | partition | ||
) |
Set SRAM partition configuration.
This function configures the size of the indirect read partition in the SRAM, in units of SRAM locations. This can only be done if OSPI module is not busy.
pRegs | [IN] OSPI flash config register base. |
partition | [IN] Auto polling state. Supported values are given by CSL_OspiWriteCompAutoPolling_t. |
none |
void CSL_ospiIntrEnable | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | intrFlag, | ||
uint32_t | enable | ||
) |
This Function enables/diables only specified OSPI interrupts.
pRegs | [IN] OSPI flash config register base. |
intrFlag | [IN] mask value for the interrupts to be enabled. Supported values are given by the CSL_OspiIntrMask_t. |
enable | [IN] TRUE: enable the specified OSPI interrupts FALSE: disable the specified OSPI interrupts |
none |
uint32_t CSL_ospiIntrStatus | ( | const CSL_ospi_flash_cfgRegs * | pRegs | ) |
This function returns the status of interrupts. It specifies whether an interrupt is active or inactive. After an interrupt is serviced, the software must set to 0 the corresponding flag in the interrupt status register.
pRegs | [IN] OSPI flash config register base. |
status | All the interrupt status. The return status can take value from the CSL_OspiIntrMask_t. |
void CSL_ospiIntrClear | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | intrFlag | ||
) |
This Function clears the status of specified interrupts.
pRegs | [IN] OSPI flash config register base. |
intrFlag | [IN] mask value for the interrupts to be cleared. given by CSL_OspiIntrMask_t. |
none |
uint32_t CSL_ospiGetSramLvl | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | read | ||
) |
This Function gets the OSPI SRAM FIFO fill level bytes.
pRegs | [IN] OSPI flash config register base. |
read | [IN] TRUE: indirect read, FALSE: indirect write |
SRAM | fifo fill level in bytes |
int32_t CSL_ospiCmdRead | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | cmd, | ||
uint32_t | rxLen | ||
) |
Read operation in config mode.
This function performs the read operation in config mode.
pRegs | [IN] OSPI flash config register base. |
cmd | [IN] Flash command opcode. |
rxLen | [IN] Number of read data bytes |
CSL_ErrType_t |
int32_t CSL_ospiCmdExtRead | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
const uint8_t * | cmdBuf, | ||
uint32_t | cmdLen, | ||
uint32_t | rxLen, | ||
uint32_t | dummyCycles | ||
) |
Extended opcode read operation in config mode.
This function performs the read operation in config mode with extended/dual opcodes.
pRegs | [IN] OSPI flash config register base. |
cmdBuf | [IN] Flash command opcode buffer. |
cmdLen | [IN] Nuber of command bytes in opcode buffer. |
rxLen | [IN] Number of read data bytes. |
dummyCycles | [IN] Dummy cyles for read operation. |
CSL_ErrType_t |
int32_t CSL_ospiCmdWrite | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
const uint8_t * | cmdBuf, | ||
uint32_t | cmdLen, | ||
const uint8_t * | txBuf, | ||
uint32_t | txLen | ||
) |
Write operation in config mode.
This function performs the write operation in config mode.
pRegs | [IN] OSPI flash config register base. |
cmdBuf | [IN] Pointer to the flash command buffer. |
cmdLen | [IN] Command buffer size in bytes. |
txBuf | [IN] Pointer to the write data buffer |
txLen | [IN] Number of write data bytes |
CSL_ErrType_t |
void CSL_ospiConfigRead | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | cmd, | ||
uint32_t | mode, | ||
uint32_t | dummyClk | ||
) |
Setup read operation transfer mode.
This function setup the configurations for read operation transfer mode.
pRegs | [IN] OSPI flash config register base. |
cmd | [IN] command opcode. |
mode | [IN] data transfer mode (single/dual/quad mode) |
dummyClk | [IN] Number of dummy clock cycles required for read op |
none |
void CSL_ospiIndReadExecute | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | rxLen | ||
) |
Execute read operation in indirect transfer mode.
This function kicks off the read operation in indirect transfer mode.
pRegs | [IN] OSPI flash config register base. |
rxLen | [IN] read length in bytes. |
none |
void CSL_ospiClrIndReadComplete | ( | const CSL_ospi_flash_cfgRegs * | pRegs | ) |
Clear indirect read operation done status.
This function clears the indirect completion status in the Indirect Read Transfer Control Register.
pRegs | [IN] OSPI flash config register base. |
none |
uint32_t CSL_ospiIndReadComplete | ( | const CSL_ospi_flash_cfgRegs * | pRegs | ) |
Check if indirect read operation is done.
This function checks if indirect read operation is done
pRegs | [IN] OSPI flash config register base. |
status | TRUE: read is done, FALSE: read is in progress |
void CSL_ospiReadFifoData | ( | uintptr_t | indAddr, |
uint8_t * | dest, | ||
uint32_t | rdLen | ||
) |
Read data from the SRAM FIFO.
This function reads the data from the SRAM FIFO in indirect transfer mode.
indAddr | [IN] OSPI indirect AHB base address. |
dest | [IN] Destination address to copy the read data |
rdLen | [IN] read length in bytes |
none |
void CSL_ospiWriteSetup | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | cmd, | ||
uint32_t | mode | ||
) |
Setup write operation transfer mode.
This function setup the configurations for write operation transfer mode.
pRegs | [IN] OSPI flash config register base. |
cmd | [IN] command opcode. |
mode | [IN] data transfer mode (single/dual/quad mode) |
none |
uint32_t CSL_ospiIsIndWriteComplete | ( | const CSL_ospi_flash_cfgRegs * | pRegs | ) |
Check if indirect write operation is done.
This function checks if indirect write operation is done
pRegs | [IN] OSPI flash config register base. |
status | TRUE: write is done, FALSE: write is in progress |
void CSL_ospiClrIndWriteComplete | ( | const CSL_ospi_flash_cfgRegs * | pRegs | ) |
Clear indirect write operation done status.
This function clears the indirect completion status in the Indirect Write Transfer Control Register.
pRegs | [IN] OSPI flash config register base. |
none |
void CSL_ospiIndWriteExecute | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | txLen | ||
) |
Execute write operation in indirect transfer mode.
This function performs the write operation in indirect transfer mode.
pRegs | [IN] OSPI flash config register base. |
txLen | [IN] write length in bytes. |
none |
void CSL_ospiIndWriteCancel | ( | const CSL_ospi_flash_cfgRegs * | pRegs | ) |
Cancel write operation in indirect transfer mode.
This function cancels the write operation in indirect transfer mode.
pRegs | [IN] OSPI flash config register base. |
none |
void CSL_ospiWriteFifoData | ( | uintptr_t | indAddr, |
const uint8_t * | src, | ||
uint32_t | wrLen | ||
) |
Write data to the SRAM FIFO.
This function writes the data to the SRAM FIFO in indirect transfer mode.
indAddr | OSPI Indirect AHB base address |
src | Source address to copy the write data |
wrLen | write length in bytes |
none |
void CSL_ospiLoopbackClkEnable | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | enable | ||
) |
Enable the adapted loopback clock circuit.
This function enables the loopback mode.
pRegs | [IN] OSPI flash config register base. |
enable | [IN] TRUE: enable OSPI loopback clock FALSE: disable OSPI loopback clock |
none |
uint32_t CSL_ospiIsIdle | ( | const CSL_ospi_flash_cfgRegs * | pRegs | ) |
Check if OSPI is idle or not.
This function checks the OSPI idle status
pRegs | [IN] OSPI flash config register base. |
idle | status TRUE: OSPI is idle, FALSE: OSPI is busy |
void CSL_ospiFlashExecCmd | ( | const CSL_ospi_flash_cfgRegs * | pRegs | ) |
Excecute the flash read/write command.
This function excecute the flash read/write command
pRegs | [IN] OSPI flash config register base. |
none |
uint32_t CSL_ospiFlashExecCmdComplete | ( | const CSL_ospi_flash_cfgRegs * | pRegs | ) |
Check the flash command execution status.
This function checks the execution status of the flash read/write command
pRegs | [IN] OSPI flash config register base. |
status | TRUE: command execution completed FALSE: command execution in progress |
void CSL_ospiConfigPhy | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | lockCycle, | ||
uint32_t | masterDelay, | ||
const uint32_t * | pSlaveDelay | ||
) |
Configure the PHY.
This function configures and calibrates the PHY
pRegs | [IN] OSPI flash config register base. |
lockCycle | [IN] |
masterDelay | [IN] Initial number of delay elements for Master DLL |
pSlaveDelay | [IN] Point to initial number of delay elements for Slave DLL if pDelay == NULL, do calibration operation |
none |
void CSL_ospiFlashStig | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | cmd, | ||
uint32_t | addr, | ||
uint32_t | data | ||
) |
Set configurations for a flash STIG command.
This function sets the command address, data and contorl for a generic STIG command
pRegs | [IN] OSPI flash config register base. |
cmd | [IN] |
addr | [IN] |
data | [IN] |
none |
void CSL_ospiIndSetStartAddr | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | startAddr, | ||
uint32_t | read | ||
) |
Configure the read or wrtie start address in Indirect mode.
This function configures indac read or write start address
pRegs | [IN] OSPI flash config register base. |
startAddr | [IN] Indirect access start address |
read | [IN] TRUE: read operation; FALSE: write operation |
none |
void CSL_ospiSetDataReadCapDelay | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | delay | ||
) |
Set the read data capture delay.
This function sets the read data capture delay in # of ref_clk cycles
pRegs | [IN] OSPI flash config register base. |
delay | [IN] delay in # of ref_clk cycle |
none |
void CSL_ospiSetCsSotDelay | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | delay | ||
) |
Set the Chip Select Start of Transfer delay.
This function sets the Chip Select Start of Transfer delay in # of ref_clk cycles
pRegs | [IN] OSPI flash config register base. |
delay | [IN] delay in # of ref_clk cycle |
none |
void CSL_ospiSetDualByteOpcodeMode | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | opcodeMode | ||
) |
Set the dual byte opcode mode.
This function enables/disables the dual byte opcode mode for OSPI commands
pRegs | [IN] OSPI flash config register base. |
opcodeMode | [IN] Opcode COnfigurations 0 - Disable dual byte opcode 1 - Enable dual byte opcode |
none |
uint32_t CSL_ospiGetDualByteOpcodeMode | ( | const CSL_ospi_flash_cfgRegs * | pRegs | ) |
Get the dual byte opcode mode.
This function reads the dual byte opcode mode enable/disable status
pRegs | [IN] OSPI flash config register base. |
none |
void CSL_ospiExtOpcodeSet | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | opcodeLo, | ||
uint32_t | opcodeUp | ||
) |
Set the dual byte opcode parameters.
This function configures the dual byte opcodes in extended opcode registers
pRegs | [IN] OSPI flash config register base. |
opcodeLo | [IN] Extended opcode lower 32-bit value. |
opcodeUp | [IN] Extended opcode upper 32-bit value. |
none |
void CSL_ospiExtOpcodeGet | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t * | opcodeLo, | ||
uint32_t * | opcodeUp | ||
) |
Get the dual byte opcode parameters.
This function reads the dual byte opcodes from extended opcode registers
pRegs | [IN] OSPI flash config register base. |
opcodeLo | [OUT] Extended opcode lower 32-bit value. |
opcodeUp | [OUT] Extended opcode upper 32-bit value. |
none |
void CSL_ospiConfigPhyDLL | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | txDelay, | ||
uint32_t | rxDelay, | ||
uint32_t | opMode, | ||
uint32_t | lockCycle, | ||
uint32_t | funcClk | ||
) |
Configure the PHY TX/RX DLL delays.
This function configures the TX/RX DLL delays of the PHY
pRegs | [IN] OSPI flash config register base. |
txDelay | [IN] TX DLL delay value |
rxDelay | [IN] RX DLL delay value |
opMode | [IN] PHY operation mode |
lockCycle | [IN] |
funcClk | [IN] OSPI CLK Frequency |
none |
void CSL_ospiPhyResyncDll | ( | const CSL_ospi_flash_cfgRegs * | pRegs, |
uint32_t | lockCycle | ||
) |
Resync the PHY DLLs after configuring the TX delays.
This function resynchronizes the PHY DLLs after configuring the TX delays. This function is invoked internally by CSL_ospiConfigPhyDLL.
pRegs | [IN] OSPI flash config register base. |
lockCycle | [IN] |
none |