PDK API Guide for J721E
SafeRTOS MPU configurations

Introduction

Files

file  SafeRTOS_MPU.h
 

Data Structures

struct  xMPU_CONFIG_ACCESS
 
struct  xMPU_CONFIG_PARAMETERS
 

Functions

 __attribute__ ((section(".startupCode"))) portBaseType xConfigureMPU(void)
 

Macros

#define CSL_ARM_R5F_MPU_REGIONS_MAX   ((uint32_t) 16U)
 
#define CSL_ARM_R5_MPU_REGION_SIZE_32BYTE   ((uint32_t) 32U)
 
#define CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR   ((uint32_t) 0x3U)
 Full access to privileged and user modes. More...
 
#define CSL_ARM_R5_CACHE_POLICY_NON_CACHEABLE   ((uint32_t) 0x0U)
 Cache Policy: Non-cacheable. More...
 
#define CSL_ARM_R5_CACHE_POLICY_WB_WA   ((uint32_t) 0x1U)
 Cache Policy: Write-back, write-allocate. More...
 
#define CSL_ARM_R5_MEM_ATTR_MAX   ((uint32_t) 0x7U)
 This should be passed to configuration. More...
 
#define CSL_ARM_R5_MPU_REGION_AC_XN_SHIFT   (0x0000000CU)
 
#define CSL_ARM_R5_MPU_REGION_AC_AP_SHIFT   (0x00000008U)
 
#define CSL_ARM_R5_MPU_REGION_AC_S_SHIFT   (0x00000002U)
 
#define CSL_ARM_R5_MPU_REGION_AC_TEX_SHIFT   (0x00000003U)
 
#define CSL_ARM_R5_MPU_REGION_AC_CB_SHIFT   (0x00000000U)
 
#define CSL_ARM_R5_MPU_REGION_AC_B_SHIFT   (0x00000000U)
 
#define CSL_ARM_R5_MPU_REGION_AC_C_SHIFT   (0x00000001U)
 

Macro Definition Documentation

◆ CSL_ARM_R5F_MPU_REGIONS_MAX

#define CSL_ARM_R5F_MPU_REGIONS_MAX   ((uint32_t) 16U)

◆ CSL_ARM_R5_MPU_REGION_SIZE_32BYTE

#define CSL_ARM_R5_MPU_REGION_SIZE_32BYTE   ((uint32_t) 32U)

◆ CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR

#define CSL_ARM_R5_ACC_PERM_PRIV_USR_RD_WR   ((uint32_t) 0x3U)

Full access to privileged and user modes.

◆ CSL_ARM_R5_CACHE_POLICY_NON_CACHEABLE

#define CSL_ARM_R5_CACHE_POLICY_NON_CACHEABLE   ((uint32_t) 0x0U)

Cache Policy: Non-cacheable.

◆ CSL_ARM_R5_CACHE_POLICY_WB_WA

#define CSL_ARM_R5_CACHE_POLICY_WB_WA   ((uint32_t) 0x1U)

Cache Policy: Write-back, write-allocate.

◆ CSL_ARM_R5_MEM_ATTR_MAX

#define CSL_ARM_R5_MEM_ATTR_MAX   ((uint32_t) 0x7U)

This should be passed to configuration.

◆ CSL_ARM_R5_MPU_REGION_AC_XN_SHIFT

#define CSL_ARM_R5_MPU_REGION_AC_XN_SHIFT   (0x0000000CU)

◆ CSL_ARM_R5_MPU_REGION_AC_AP_SHIFT

#define CSL_ARM_R5_MPU_REGION_AC_AP_SHIFT   (0x00000008U)

◆ CSL_ARM_R5_MPU_REGION_AC_S_SHIFT

#define CSL_ARM_R5_MPU_REGION_AC_S_SHIFT   (0x00000002U)

◆ CSL_ARM_R5_MPU_REGION_AC_TEX_SHIFT

#define CSL_ARM_R5_MPU_REGION_AC_TEX_SHIFT   (0x00000003U)

◆ CSL_ARM_R5_MPU_REGION_AC_CB_SHIFT

#define CSL_ARM_R5_MPU_REGION_AC_CB_SHIFT   (0x00000000U)

◆ CSL_ARM_R5_MPU_REGION_AC_B_SHIFT

#define CSL_ARM_R5_MPU_REGION_AC_B_SHIFT   (0x00000000U)

◆ CSL_ARM_R5_MPU_REGION_AC_C_SHIFT

#define CSL_ARM_R5_MPU_REGION_AC_C_SHIFT   (0x00000001U)

Function Documentation

◆ __attribute__()

__attribute__ ( (section(".startupCode"))  )