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PDK API Guide for J721E
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Files | |
file | OSPI_v0.h |
OSPI driver implementation for OSPI IP V0 controller. | |
Data Structures | |
struct | OSPI_dmaInfo |
OSPI UDMA info structure. More... | |
struct | OSPI_v0_HwAttrs |
OSPI IP V0 Hardware attributes. More... | |
struct | OSPI_v0_Object |
OSPI IP V0 driver object. More... | |
Functions | |
uint32_t | OSPI_getReadDataCapDelay (SPI_Handle handle) |
Variables | |
const OSPI_FxnTable | OSPI_FxnTable_v0 |
Enumerations | |
enum | SPI_TransactionType { SPI_TRANSACTION_TYPE_READ = 0, SPI_TRANSACTION_TYPE_WRITE } |
Type of the SPI transaction. More... | |
enum | OSPI_OperMode { OSPI_OPER_MODE_CFG = 0U, OSPI_OPER_MODE_IND_XFER, OSPI_OPER_MODE_DAC_XFER } |
OSPI controller modes. More... | |
enum | OSPI_xferLines { OSPI_XFER_LINES_SINGLE = 0U, OSPI_XFER_LINES_DUAL, OSPI_XFER_LINES_QUAD, OSPI_XFER_LINES_OCTAL } |
Number of lines used for OSPI read/write transaction. More... | |
Macros | |
#define | OSPI_V0_CMD_SET_CFG_MODE (OSPI_CMD_RESERVED + 0U) |
Set SPI controller into CONFIG Mode. More... | |
#define | OSPI_V0_CMD_SET_XFER_MODE (OSPI_CMD_RESERVED + 1U) |
Set SPI controller into Transfer Mode. More... | |
#define | OSPI_V0_CMD_XFER_MODE_RW (OSPI_CMD_RESERVED + 2U) |
Set direction of data flow when in memory mapped mode. More... | |
#define | OSPI_V0_CMD_XFER_OPCODE (OSPI_CMD_RESERVED + 3U) |
Set flash specific command when in indirect transfer mode. More... | |
#define | OSPI_V0_CMD_SET_XFER_LINES (OSPI_CMD_RESERVED + 4U) |
Set number of lines configured for RX/TX operation. More... | |
#define | OSPI_V0_CMD_RD_DUMMY_CLKS (OSPI_CMD_RESERVED + 5U) |
Set number of dummy clock cycles for read operation. More... | |
#define | OSPI_V0_CMD_CFG_PHY (OSPI_CMD_RESERVED + 6U) |
Set command to configure phy. More... | |
#define | OSPI_V0_CMD_ENABLE_DDR (OSPI_CMD_RESERVED + 7U) |
Set command to enable DDR mode. More... | |
#define | OSPI_V0_CMD_CFG_XIP (OSPI_CMD_RESERVED + 8U) |
Set command to enable XIP mode. More... | |
#define | OSPI_V0_CMD_ENABLE_SDR (OSPI_CMD_RESERVED + 9U) |
Set command to disable DDR mode. More... | |
#define | OSPI_V0_CMD_XFER_OPCODE_EXT (OSPI_CMD_RESERVED + 10U) |
Set extended opcodes when in indirect transfer mode. More... | |
#define | OSPI_V0_CMD_EXT_RD_DUMMY_CLKS (OSPI_CMD_RESERVED + 11U) |
Set extended opcode command read dummy cycles. More... | |
#define | OSPI_V0_CMD_CFG_RD_DELAY (OSPI_CMD_RESERVED + 12U) |
Set read capture delay. More... | |
#define | OSPI_V0_CMD_CFG_DUMMY_CYCLE (OSPI_CMD_RESERVED + 13U) |
Set dummy cycles in flash device. More... | |
#define | OSPI_V0_CMD_EXT_RD_CMD_LEN (OSPI_CMD_RESERVED + 14U) |
Set extended opcode command read dummy cycles. More... | |
#define OSPI_V0_CMD_SET_CFG_MODE (OSPI_CMD_RESERVED + 0U) |
Set SPI controller into CONFIG Mode.
Command code used with SPI_control()
#define OSPI_V0_CMD_SET_XFER_MODE (OSPI_CMD_RESERVED + 1U) |
Set SPI controller into Transfer Mode.
Command code used with SPI_control()
#define OSPI_V0_CMD_XFER_MODE_RW (OSPI_CMD_RESERVED + 2U) |
Set direction of data flow when in memory mapped mode.
Conventional SPI_transfer() calls no not require a read or write direction as SPI operates a in full duplex mode. This function is only used in combination with memory mapped mode where a read or write direction is required with SPI flash memory.
#define OSPI_V0_CMD_XFER_OPCODE (OSPI_CMD_RESERVED + 3U) |
Set flash specific command when in indirect transfer mode.
#define OSPI_V0_CMD_SET_XFER_LINES (OSPI_CMD_RESERVED + 4U) |
Set number of lines configured for RX/TX operation.
#define OSPI_V0_CMD_RD_DUMMY_CLKS (OSPI_CMD_RESERVED + 5U) |
Set number of dummy clock cycles for read operation.
#define OSPI_V0_CMD_CFG_PHY (OSPI_CMD_RESERVED + 6U) |
Set command to configure phy.
#define OSPI_V0_CMD_ENABLE_DDR (OSPI_CMD_RESERVED + 7U) |
Set command to enable DDR mode.
#define OSPI_V0_CMD_CFG_XIP (OSPI_CMD_RESERVED + 8U) |
Set command to enable XIP mode.
#define OSPI_V0_CMD_ENABLE_SDR (OSPI_CMD_RESERVED + 9U) |
Set command to disable DDR mode.
#define OSPI_V0_CMD_XFER_OPCODE_EXT (OSPI_CMD_RESERVED + 10U) |
Set extended opcodes when in indirect transfer mode.
#define OSPI_V0_CMD_EXT_RD_DUMMY_CLKS (OSPI_CMD_RESERVED + 11U) |
Set extended opcode command read dummy cycles.
#define OSPI_V0_CMD_CFG_RD_DELAY (OSPI_CMD_RESERVED + 12U) |
Set read capture delay.
#define OSPI_V0_CMD_CFG_DUMMY_CYCLE (OSPI_CMD_RESERVED + 13U) |
Set dummy cycles in flash device.
#define OSPI_V0_CMD_EXT_RD_CMD_LEN (OSPI_CMD_RESERVED + 14U) |
Set extended opcode command read dummy cycles.
enum SPI_TransactionType |
enum OSPI_OperMode |
enum OSPI_xferLines |
uint32_t OSPI_getReadDataCapDelay | ( | SPI_Handle | handle | ) |
const OSPI_FxnTable OSPI_FxnTable_v0 |