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PDK API Guide for J721E
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Files | |
file | wd_timer.h |
Watchdog timer APIs and macros. | |
Functions | |
void | WDTIMEREnable (uint32_t baseAddr) |
Starts/Enables the watchdog timer. More... | |
void | WDTIMERDisable (uint32_t baseAddr) |
Stops/Disables the watchdog timer. More... | |
uint32_t | WDTIMERRevisionIDGet (uint32_t baseAddr) |
Return the revision id of the SOC used. More... | |
void | WDTIMERReset (uint32_t baseAddr) |
Reset the watchdog timer module. More... | |
void | WDTIMERPreScalerClkEnable (uint32_t baseAddr, uint32_t ptv) |
This API will configure and enable the pre-scaler clock. More... | |
void | WDTIMERPreScalerClkDisable (uint32_t baseAddr) |
This API will disable the pre-scaler clock. More... | |
void | WDTIMERCounterSet (uint32_t baseAddr, uint32_t countVal) |
Set/Write the Counter register with the counter value. More... | |
uint32_t | WDTIMERCounterGet (uint32_t baseAddr) |
Get/Read the counter value from the counter register. More... | |
void | WDTIMERReloadSet (uint32_t baseAddr, uint32_t reloadVal) |
Set the reload count value in the Watchdog timer load register. More... | |
uint32_t | WDTIMERReloadGet (uint32_t baseAddr) |
Get the reload count value from the Watchdog timer load register. More... | |
void | WDTIMERTriggerSet (uint32_t baseAddr, uint32_t trigVal) |
Set/enable the trigger write access. More... | |
void | WDTIMERDelaySet (uint32_t baseAddr, uint32_t delayVal) |
Load the delay register of Watchdog timer with the delay value. More... | |
uint32_t | WDTIMERDelayGet (uint32_t baseAddr) |
Return the delay register value of Watchdog timer. More... | |
void | WDTIMERIntRawStatusSet (uint32_t baseAddr, uint32_t intFlags) |
Set IRQ status by software. More... | |
uint32_t | WDTIMERIntRawStatusGet (uint32_t baseAddr) |
Return the Raw IRQ status. More... | |
uint32_t | WDTIMERIntStatusGet (uint32_t baseAddr) |
Read the status of WD_TIMER_WIRQSTAT register. More... | |
void | WDTIMERIntStatusClear (uint32_t baseAddr, uint32_t intFlags) |
Clear IRQ status. More... | |
void | WDTIMERIntEnable (uint32_t baseAddr, uint32_t intFlags) |
Enable Watchdog timer interrupts. More... | |
uint32_t | WDTIMERIntEnableStatusGet (uint32_t baseAddr) |
Used to check whether interrupts of Watchdog timer are enabled or disabled. More... | |
void | WDTIMERIntDisable (uint32_t baseAddr, uint32_t intFlags) |
Disable Watchdog timer interrupts. More... | |
uint32_t | WDTIMERWritePostedStatusGet (uint32_t baseAddr, uint32_t flags) |
Read the status of WD_TIMER_WWPS register. More... | |
#define WD_TIMER_PRESCALER_CLK_DIV_1 (uint32_t) (0x00000000U) |
#define WD_TIMER_PRESCALER_CLK_DIV_2 (uint32_t) (0x00000004U) |
#define WD_TIMER_PRESCALER_CLK_DIV_4 (uint32_t) (0x00000008U) |
#define WD_TIMER_PRESCALER_CLK_DIV_8 (uint32_t) (0x0000000CU) |
#define WD_TIMER_PRESCALER_CLK_DIV_16 (uint32_t) (0x00000010U) |
#define WD_TIMER_PRESCALER_CLK_DIV_32 (uint32_t) (0x00000014U) |
#define WD_TIMER_PRESCALER_CLK_DIV_64 (uint32_t) (0x00000018U) |
#define WD_TIMER_PRESCALER_CLK_DIV_128 (uint32_t) (0x0000001CU) |
#define WD_TIMER_INT_DELAY (WD_TIMER_WIRQSTATRAW_EVENT_DLY_MASK) |
Values that can be passed to WDTIMERIntRawStatusSet, WDTIMERIntStatusClear APIs as intFlags.
#define WD_TIMER_INT_OVERFLOW (WD_TIMER_WIRQSTATRAW_EVENT_OVF_MASK) |
#define WD_TIMER_INT_ALL |
#define WD_TIMER_INT_ENABLE_DELAY (WD_TIMER_WIRQENSET_ENABLE_DLY_MASK) |
values passed to WDTIMERIntEnable as intFlags.
#define WD_TIMER_INT_ENABLE_OVRFLW (WD_TIMER_WIRQENSET_ENABLE_OVF_MASK) |
#define WD_TIMER_INT_ENABLE_ALL |
#define WD_TIMER_INT_DISABLE_DELAY (WD_TIMER_WIRQENCLR_ENABLE_DLY_MASK) |
Values passed to WDTIMERIntDisable as intFlags.
#define WD_TIMER_INT_DISABLE_OVRFLW (WD_TIMER_WIRQENCLR_ENABLE_OVF_MASK) |
#define WD_TIMER_INT_DISABLE_ALL |
#define WD_TIMER_WRITE_PENDING_WCLR ((uint32_t) WD_TIMER_WWPS_W_PEND_WCLR_MASK) |
Values to read the status of WDTIMERWritePostedStatusGet API.
#define WD_TIMER_WRITE_PENDING_WCRR ((uint32_t) WD_TIMER_WWPS_W_PEND_WCRR_MASK) |
#define WD_TIMER_WRITE_PENDING_WLDR ((uint32_t) WD_TIMER_WWPS_W_PEND_WLDR_MASK) |
#define WD_TIMER_WRITE_PENDING_WTGR ((uint32_t) WD_TIMER_WWPS_W_PEND_WTGR_MASK) |
#define WD_TIMER_WRITE_PENDING_WSPR ((uint32_t) WD_TIMER_WWPS_W_PEND_WSPR_MASK) |
#define WD_TIMER_WRITE_PENDING_WDLY ((uint32_t) WD_TIMER_WWPS_W_PEND_WDLY_MASK) |
void WDTIMEREnable | ( | uint32_t | baseAddr | ) |
Starts/Enables the watchdog timer.
baseAddr | Base Address of the Watchdog Timer Module Registers. |
void WDTIMERDisable | ( | uint32_t | baseAddr | ) |
Stops/Disables the watchdog timer.
baseAddr | Base Address of the Watchdog Timer Module Registers. |
uint32_t WDTIMERRevisionIDGet | ( | uint32_t | baseAddr | ) |
Return the revision id of the SOC used.
baseAddr | Base Address of the Watchdog Timer Module Registers. |
void WDTIMERReset | ( | uint32_t | baseAddr | ) |
Reset the watchdog timer module.
baseAddr | Base Address of the Watchdog Timer Module Registers. |
void WDTIMERPreScalerClkEnable | ( | uint32_t | baseAddr, |
uint32_t | ptv | ||
) |
This API will configure and enable the pre-scaler clock.
baseAddr | Base Address of the Watchdog Timer Module Register. |
ptv | Pre-scale clock Timer value. |
'ptv' can take the following values
WD_TIMER_PRESCALER_CLK_DIV_1 - WD_TIMER Functional clock divide by 1
WD_TIMER_PRESCALER_CLK_DIV_2 - WD_TIMER Functional clock divide by 2
WD_TIMER_PRESCALER_CLK_DIV_4 - WD_TIMER Functional clock divide by 4
WD_TIMER_PRESCALER_CLK_DIV_8 - WD_TIMER Functional clock divide by 8
WD_TIMER_PRESCALER_CLK_DIV_16 - WD_TIMER Functional clock divide by 16
WD_TIMER_PRESCALER_CLK_DIV_32 - WD_TIMER Functional clock divide by 32
WD_TIMER_PRESCALER_CLK_DIV_64 - WD_TIMER Functional clock divide by 64
WD_TIMER_PRESCALER_CLK_DIV_128 - WD_TIMER Functional clock divide by 128
void WDTIMERPreScalerClkDisable | ( | uint32_t | baseAddr | ) |
This API will disable the pre-scaler clock.
baseAddr | Base Address of the Watchdog Timer Module Register. |
void WDTIMERCounterSet | ( | uint32_t | baseAddr, |
uint32_t | countVal | ||
) |
Set/Write the Counter register with the counter value.
baseAddr | Base Address of the Watchdog Timer Module Register. |
countVal | Count value for the Watchdog Timer. |
uint32_t WDTIMERCounterGet | ( | uint32_t | baseAddr | ) |
Get/Read the counter value from the counter register.
baseAddr | Base Address of the Watchdog Timer Module Register. |
void WDTIMERReloadSet | ( | uint32_t | baseAddr, |
uint32_t | reloadVal | ||
) |
Set the reload count value in the Watchdog timer load register.
baseAddr | Base Address of the Watchdog Timer Module Register. |
reloadVal | The reload count value of the Watchdog timer. |
uint32_t WDTIMERReloadGet | ( | uint32_t | baseAddr | ) |
Get the reload count value from the Watchdog timer load register.
baseAddr | Base Address of the Watchdog Timer Module Register. |
void WDTIMERTriggerSet | ( | uint32_t | baseAddr, |
uint32_t | trigVal | ||
) |
Set/enable the trigger write access.
baseAddr | Base Address of the Watchdog Timer Module Register. |
trigVal | Value to be written to the WTGR register. |
void WDTIMERDelaySet | ( | uint32_t | baseAddr, |
uint32_t | delayVal | ||
) |
Load the delay register of Watchdog timer with the delay value.
baseAddr | Base Address of the Watchdog Timer Module Register. |
delayVal | Delay value. |
uint32_t WDTIMERDelayGet | ( | uint32_t | baseAddr | ) |
Return the delay register value of Watchdog timer.
baseAddr | Base Address of the Watchdog Timer Module Register. |
void WDTIMERIntRawStatusSet | ( | uint32_t | baseAddr, |
uint32_t | intFlags | ||
) |
Set IRQ status by software.
baseAddr | Base Address of the Watchdog Timer Module Register. |
intFlags | Variable used to trigger the events. |
'intFlags' can take the following values
WD_TIMER_INT_DELAY - Set the status for delay interrupt
WD_TIMER_INT_OVERFLOW - Set the status for overflow interrupt
uint32_t WDTIMERIntRawStatusGet | ( | uint32_t | baseAddr | ) |
Return the Raw IRQ status.
baseAddr | Base Address of the Watchdog Timer Module Register. |
uint32_t WDTIMERIntStatusGet | ( | uint32_t | baseAddr | ) |
Read the status of WD_TIMER_WIRQSTAT register.
baseAddr | Base Address of the DMTimer Module Register. |
void WDTIMERIntStatusClear | ( | uint32_t | baseAddr, |
uint32_t | intFlags | ||
) |
Clear IRQ status.
baseAddr | Base Address of the Watchdog Timer Module Register. |
intFlags | Variable used to clear the events. |
'intFlags' can take the following values
WD_TIMER_INT_DELAY - Clear the status for delay interrupt
WD_TIMER_INT_OVERFLOW - Clear the status for overflow interrupt
void WDTIMERIntEnable | ( | uint32_t | baseAddr, |
uint32_t | intFlags | ||
) |
Enable Watchdog timer interrupts.
baseAddr | Base Address of the Watchdog Timer Module Register. |
intFlags | Variable used to enable interrupts. |
'intFlags' can take the following values
WD_TIMER_INT_ENABLE_DELAY - Enable the delay interrupt
WD_TIMER_INT_ENABLE_OVRFLW - Enable the overflow interrupt
uint32_t WDTIMERIntEnableStatusGet | ( | uint32_t | baseAddr | ) |
Used to check whether interrupts of Watchdog timer are enabled or disabled.
baseAddr | Base Address of the Watchdog Timer Module Register. |
void WDTIMERIntDisable | ( | uint32_t | baseAddr, |
uint32_t | intFlags | ||
) |
Disable Watchdog timer interrupts.
baseAddr | Base Address of the Watchdog Timer Module Register. |
intFlags | Variable used to enable interrupts. |
'intFlags' can take the following values
WD_TIMER_INT_DISABLE_DELAY - Disable the delay interrupt
WD_TIMER_INT_DISABLE_OVRFLW - Disable the overflow interrupt
uint32_t WDTIMERWritePostedStatusGet | ( | uint32_t | baseAddr, |
uint32_t | flags | ||
) |
Read the status of WD_TIMER_WWPS register.
baseAddr | Base Address of the Watchdog Timer Module Register. |
flags | Status of the particular field to be returned. |
'flags' can take the following values
WD_TIMER_WRITE_PENDING_WCLR - Write pending for register WD_TIMER_WCLR
WD_TIMER_WRITE_PENDING_WCRR - Write pending for register WD_TIMER_WCRR
WD_TIMER_WRITE_PENDING_WLDR - Write pending for register WD_TIMER_WLDR
WD_TIMER_WRITE_PENDING_WTGR - Write pending for register WD_TIMER_WTGR
WD_TIMER_WRITE_PENDING_WSPR - Write pending for register WD_TIMER_WSPR
WD_TIMER_WRITE_PENDING_WDLY - Write pending for register WD_TIMER_WDLY